[v7,04/10] scsi: ufs: ufs-qcom: Allow the first init start with the maximum supported gear
Message ID | 1701407001-471-5-git-send-email-quic_cang@quicinc.com |
---|---|
State | New |
Headers |
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Bottomley" <jejb@linux.ibm.com>, linux-kernel@vger.kernel.org (open list) Subject: [PATCH v7 04/10] scsi: ufs: ufs-qcom: Allow the first init start with the maximum supported gear Date: Thu, 30 Nov 2023 21:03:14 -0800 Message-Id: <1701407001-471-5-git-send-email-quic_cang@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1701407001-471-1-git-send-email-quic_cang@quicinc.com> References: <1701407001-471-1-git-send-email-quic_cang@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: foHvakcEYP59TyVN1-D3N33u1nFEtcIF X-Proofpoint-ORIG-GUID: foHvakcEYP59TyVN1-D3N33u1nFEtcIF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-01_02,2023-11-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 malwarescore=0 suspectscore=0 mlxlogscore=999 phishscore=0 priorityscore=1501 spamscore=0 impostorscore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2312010028 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Thu, 30 Nov 2023 21:05:27 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784054683395539806 X-GMAIL-MSGID: 1784054683395539806 |
Series |
Enable HS-G5 support on SM8550
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Commit Message
Can Guo
Dec. 1, 2023, 5:03 a.m. UTC
During host driver init, the phy_gear is set to the minimum supported gear (HS_G2). Then, during the first power mode change, the negotiated gear, say HS-G4, is updated to the phy_gear variable so that in the second init the updated phy_gear can be used to program the PHY. But the current code only allows update the phy_gear to a higher value. If one wants to start the first init with the maximum support gear, say HS-G4, the phy_gear is not updated to HS-G3 if the device only supports HS-G3. The original check added there is intend to make sure the phy_gear won't be updated when gear is scaled down (during clock scaling). Update the check so that one can start the first init with the maximum support gear without breaking the original fix by checking the ufshcd_state, that is, allow update to phy_gear only if power mode change is invoked from ufshcd_probe_hba(). Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Can Guo <quic_cang@quicinc.com> --- drivers/ufs/host/ufs-qcom.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
Comments
On 12/1/2023 10:33 AM, Can Guo wrote: > During host driver init, the phy_gear is set to the minimum supported gear > (HS_G2). Then, during the first power mode change, the negotiated gear, say > HS-G4, is updated to the phy_gear variable so that in the second init the > updated phy_gear can be used to program the PHY. > > But the current code only allows update the phy_gear to a higher value. If > one wants to start the first init with the maximum support gear, say HS-G4, > the phy_gear is not updated to HS-G3 if the device only supports HS-G3. > > The original check added there is intend to make sure the phy_gear won't be > updated when gear is scaled down (during clock scaling). Update the check > so that one can start the first init with the maximum support gear without > breaking the original fix by checking the ufshcd_state, that is, allow > update to phy_gear only if power mode change is invoked from > ufshcd_probe_hba(). > > Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > Signed-off-by: Can Guo <quic_cang@quicinc.com> > --- > drivers/ufs/host/ufs-qcom.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c > index 9a90019..81056b9 100644 > --- a/drivers/ufs/host/ufs-qcom.c > +++ b/drivers/ufs/host/ufs-qcom.c > @@ -916,11 +916,12 @@ static int ufs_qcom_pwr_change_notify(struct ufs_hba *hba, > } > > /* > - * Update phy_gear only when the gears are scaled to a higher value. This is > - * because, the PHY gear settings are backwards compatible and we only need to > - * change the PHY gear settings while scaling to higher gears. > + * During UFS driver probe, always update the PHY gear to match the negotiated > + * gear, so that, if quirk UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH is enabled, > + * the second init can program the optimal PHY settings. This allows one to start > + * the first init with either the minimum or the maximum support gear. > */ > - if (dev_req_params->gear_tx > host->phy_gear) > + if (hba->ufshcd_state == UFSHCD_STATE_RESET) > host->phy_gear = dev_req_params->gear_tx; > > /* enable the device ref clock before changing to HS mode */ Reviewed-by: Nitin Rawat <quic_nitirawa@quicinc.com>
diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 9a90019..81056b9 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -916,11 +916,12 @@ static int ufs_qcom_pwr_change_notify(struct ufs_hba *hba, } /* - * Update phy_gear only when the gears are scaled to a higher value. This is - * because, the PHY gear settings are backwards compatible and we only need to - * change the PHY gear settings while scaling to higher gears. + * During UFS driver probe, always update the PHY gear to match the negotiated + * gear, so that, if quirk UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH is enabled, + * the second init can program the optimal PHY settings. This allows one to start + * the first init with either the minimum or the maximum support gear. */ - if (dev_req_params->gear_tx > host->phy_gear) + if (hba->ufshcd_state == UFSHCD_STATE_RESET) host->phy_gear = dev_req_params->gear_tx; /* enable the device ref clock before changing to HS mode */