From patchwork Tue Oct 24 13:21:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tip-bot2 for Thomas Gleixner X-Patchwork-Id: 157470 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:ce89:0:b0:403:3b70:6f57 with SMTP id p9csp1938950vqx; Tue, 24 Oct 2023 06:24:35 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFi8x/stpBCRApgPPscvWuQMIKqyd9R/joLw5rnXK71jgXyeG7DT2xua7R7pEswNgB/FazY X-Received: by 2002:a05:6a20:914e:b0:17b:e2bd:b767 with SMTP id x14-20020a056a20914e00b0017be2bdb767mr2809838pzc.23.1698153874850; Tue, 24 Oct 2023 06:24:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698153874; cv=none; d=google.com; s=arc-20160816; b=D7kLlXg+lqemSMo4FNeD4ZZIxuuLh6nI0rcku1hAjS7dTy3aIhdDMpsYkgdXc4EFUS /vBfhSkTKPwoK3WdanXCAs5RxzJXzWe/ylxtwnRbSB2ywJq7+zOP8Fr5iG13bxqxzUxb 5Q4bX+B1tbT2E2rtR00wEzJ2PMBFaYP/O59TjYG3aB9o9JsaaSDsn5rqV34EZPNtW2me x/ARW7dY5uAVDiIXfIaCDq3t9zE4P4+BYC/VO6if9RYBhRFGCM5W/HA0brEEWTUJn1XW VAIdHsbLRX+bCyrxz32bbYwSqW6zPVogBzSh+Ylx8fDKD5joUa9L9a3w+K7uSMcmKMQ+ tYsQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:robot-unsubscribe :robot-id:message-id:mime-version:references:in-reply-to:cc:subject :to:reply-to:sender:from:dkim-signature:dkim-signature:date; bh=3RT1+0kU05/586+93A6K9akABUi1K/NeShAB9w46Uwo=; fh=LWlv3U+xZ3+vQt4tlJRIlKl5VzN7iFjjE/bzRmlxKDA=; b=QImPYO4fu4zXWduA9mm+V4y/Z9hEj+mow0s3yEgTTlsznyzMoqLu4vTT+FPbW4VOF8 onXV9Lxzvi2aedDUbk7cIOeAXWA0qIdk3I17u5Pmn9wwyqEUblXrxgdg68Q3/B+7E6KU rdNKAjf6jfwcyux07E9AKHpRbepJMtmFnaYXNeRokwLn1Gj3hAO+8cuF8ArnKhTRxjvH NBlv2VpMv/wSx4EBHgnC6bXB6y1kz2yVBdxGgP8DOyoH37YKLV10JKU03MTKsk9E7893 q7bvgEHF+5aClhcBoAlNKGnVsNJqJiIsiMJDP5d04LMAmFQbPfxjtKaO3gWDMtUvyjTd Nm/w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=xtY8xsSL; dkim=neutral (no key) header.i=@linutronix.de header.b=OxOPkvAc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from agentk.vger.email (agentk.vger.email. [2620:137:e000::3:2]) by mx.google.com with ESMTPS id w11-20020a17090a460b00b0026d40e6a819si10365145pjg.157.2023.10.24.06.24.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Oct 2023 06:24:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=xtY8xsSL; dkim=neutral (no key) header.i=@linutronix.de header.b=OxOPkvAc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 1BF7E80B130E; Tue, 24 Oct 2023 06:24:32 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234716AbjJXNX2 (ORCPT + 26 others); Tue, 24 Oct 2023 09:23:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51464 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234721AbjJXNWG (ORCPT ); Tue, 24 Oct 2023 09:22:06 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E7411721; Tue, 24 Oct 2023 06:21:10 -0700 (PDT) Date: Tue, 24 Oct 2023 13:21:07 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1698153668; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3RT1+0kU05/586+93A6K9akABUi1K/NeShAB9w46Uwo=; b=xtY8xsSL52B2LPZIrBWPyaT5+lyTGS7VQQznoEQiYDBOJD6Zy1nVfXiznvMx4fNQmjuxpL LnG1c8DbnJpXevfds92qf7IV6Slr5F0icxKSNj39gZzcX6n/iISE8p3+9Heuxw8ve/812O 7hWLrHzLadiBuUB/mRlf1+SkpY7R9+578zNZKhWdp14nHoE27+7uq8INqoYEYNhr9rjAms 88e8pM/lmXjgSsLe9b+FTPQnlKd+rNGLN2tvx4wyY+sSe12C3EyBz1QtkIt/vgKUeNGMlt 4bzMQ3hf0XJJ0XDbS2NFc8I5f8Zs/igvy5rBiteCHvParMzw1mzeq/bpL1uo3Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1698153668; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3RT1+0kU05/586+93A6K9akABUi1K/NeShAB9w46Uwo=; b=OxOPkvAcno+GNCHxIFkuxN+ZeMCMvUKOTVSAcb0tWcZo5v9pKwWbU8sida1aViTXVpp0YK xgO8hyf9O/20qUBw== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/microcode] x86/microcode/intel: Save the microcode only after a successful late-load Cc: Thomas Gleixner , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20231002115902.505491309@linutronix.de> References: <20231002115902.505491309@linutronix.de> MIME-Version: 1.0 Message-ID: <169815366759.3135.9884743289182643408.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 24 Oct 2023 06:24:32 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778645722338788849 X-GMAIL-MSGID: 1780643397564123941 The following commit has been merged into the x86/microcode branch of tip: Commit-ID: 2a1dada3d1cf8f80a27663653a371d99dbf5d540 Gitweb: https://git.kernel.org/tip/2a1dada3d1cf8f80a27663653a371d99dbf5d540 Author: Thomas Gleixner AuthorDate: Mon, 02 Oct 2023 13:59:44 +02:00 Committer: Borislav Petkov (AMD) CommitterDate: Tue, 24 Oct 2023 15:05:53 +02:00 x86/microcode/intel: Save the microcode only after a successful late-load There are situations where the late microcode is loaded into memory but is not applied: 1) The rendezvous fails 2) The microcode is rejected by the CPUs If any of this happens then the pointer which was updated at firmware load time is stale and subsequent CPU hotplug operations either fail to update or create inconsistent microcode state. Save the loaded microcode in a separate pointer before the late load is attempted and when successful, update the hotplug pointer accordingly via a new microcode_ops callback. Remove the pointless fallback in the loader to a microcode pointer which is never populated. Signed-off-by: Thomas Gleixner Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20231002115902.505491309@linutronix.de --- arch/x86/kernel/cpu/microcode/core.c | 4 +++- arch/x86/kernel/cpu/microcode/intel.c | 30 +++++++++++------------ arch/x86/kernel/cpu/microcode/internal.h | 1 +- 3 files changed, 20 insertions(+), 15 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c index de3eb97..2b742fe 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -397,6 +397,10 @@ static int microcode_reload_late(void) store_cpu_caps(&prev_info); ret = stop_machine_cpuslocked(__reload_late, NULL, cpu_online_mask); + + if (microcode_ops->finalize_late_load) + microcode_ops->finalize_late_load(ret); + if (!ret) { pr_info("Reload succeeded, microcode revision: 0x%x -> 0x%x\n", old, boot_cpu_data.microcode); diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index 9b66144..076133b 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -36,6 +36,7 @@ static const char ucode_path[] = "kernel/x86/microcode/GenuineIntel.bin"; /* Current microcode patch used in early patching on the APs. */ static struct microcode_intel *ucode_patch_va __read_mostly; +static struct microcode_intel *ucode_patch_late __read_mostly; /* last level cache size per core */ static unsigned int llc_size_per_core __ro_after_init; @@ -470,12 +471,9 @@ static enum ucode_state apply_microcode_intel(int cpu) if (WARN_ON(raw_smp_processor_id() != cpu)) return UCODE_ERROR; - mc = ucode_patch_va; - if (!mc) { - mc = uci->mc; - if (!mc) - return UCODE_NFOUND; - } + mc = ucode_patch_late; + if (!mc) + return UCODE_NFOUND; /* * Save us the MSR write below - which is a particular expensive @@ -594,15 +592,7 @@ static enum ucode_state parse_microcode_blobs(int cpu, struct iov_iter *iter) if (!new_mc) return UCODE_NFOUND; - /* Save for CPU hotplug */ - save_microcode_patch((struct microcode_intel *)new_mc); - uci->mc = ucode_patch_va; - - vfree(new_mc); - - pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n", - cpu, cur_rev, uci->cpu_sig.rev); - + ucode_patch_late = (struct microcode_intel *)new_mc; return UCODE_NEW; } @@ -659,10 +649,20 @@ static enum ucode_state request_microcode_fw(int cpu, struct device *device) return ret; } +static void finalize_late_load(int result) +{ + if (!result) + save_microcode_patch(ucode_patch_late); + + vfree(ucode_patch_late); + ucode_patch_late = NULL; +} + static struct microcode_ops microcode_intel_ops = { .request_microcode_fw = request_microcode_fw, .collect_cpu_info = collect_cpu_info, .apply_microcode = apply_microcode_intel, + .finalize_late_load = finalize_late_load, }; static __init void calc_llc_size_per_core(struct cpuinfo_x86 *c) diff --git a/arch/x86/kernel/cpu/microcode/internal.h b/arch/x86/kernel/cpu/microcode/internal.h index 1cfc6ec..32f6ad5 100644 --- a/arch/x86/kernel/cpu/microcode/internal.h +++ b/arch/x86/kernel/cpu/microcode/internal.h @@ -31,6 +31,7 @@ struct microcode_ops { */ enum ucode_state (*apply_microcode)(int cpu); int (*collect_cpu_info)(int cpu, struct cpu_signature *csig); + void (*finalize_late_load)(int result); }; extern struct ucode_cpu_info ucode_cpu_info[];