From patchwork Tue Oct 24 13:20:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tip-bot2 for Thomas Gleixner X-Patchwork-Id: 157452 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:ce89:0:b0:403:3b70:6f57 with SMTP id p9csp1937679vqx; Tue, 24 Oct 2023 06:22:26 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEoIGr21sssRe5/jrNYZ7Kzi0yNz9gU+IKQ/a1kIGLFmvchlC8zTfJ0Ly69BQRkQxc+LcHP X-Received: by 2002:a17:902:e74a:b0:1c7:5a63:43bb with SMTP id p10-20020a170902e74a00b001c75a6343bbmr10845225plf.8.1698153746027; Tue, 24 Oct 2023 06:22:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698153746; cv=none; d=google.com; s=arc-20160816; b=ELFVCpTJY3yAlOhuvyAegIzENDwxrWJm4TJ/4e2mURlpJ6w9PDNFA122pzliyg5wgG 0dPX3QVBiBhvxC8BVNfOTGO8j4snx5Ik6CFIHabEvonksXIvqSKBKkgKAbcgA7OIH+W9 FNwzS9V9N2ZH5i3+I1uLMv++AzUHvHRXpeRNR7uGXQtS8597Z+7Sbv/nxhudCpW34gzs YUsm5+pCfqt9BkHeBAv4NsV3sby8sRzG7wAgNpzGoS2RgTQs+pmXVqOK8j3Ig4Ij8JLw UMXFVUCZu7uTdplvwREiTb0KsR8WmXssWB+poklk6W0Icc33yEipfPGhMC6aHlf5qKp2 Gjag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:robot-unsubscribe :robot-id:message-id:mime-version:references:in-reply-to:cc:subject :to:reply-to:sender:from:dkim-signature:dkim-signature:date; bh=vw8iqs9QsHpfzltom5MR2q4mLnKifyKOmiEkeG+S3lw=; fh=LWlv3U+xZ3+vQt4tlJRIlKl5VzN7iFjjE/bzRmlxKDA=; b=GYIWoGDYqygYnKOvfKFpV9UrBVdv5Zle+T2gEC7pN9EJjJZ5fwI9yb7bGUSWLLXUII 6XMCfRnn2qOckNCavXmu2LP1GD7hgHp6jLHL/vbme6Mpb+6wm6Tn8asxzTvfuK3O/PRz fSrtBnb9SGfxqpWoTBS8vS7HDYLrFGna1fjlqZt+EMXylEGH/4QzzOdQX0U2QuwhiBV9 tFVXGXjQIIYK8SFG3bXUftNiLp4Srv/AZbkWsdqcIJkzKBI/W0vlm74Qlyr9n3X82lE4 cahY+YFxuBkCt1BGQYlvBn6WACI5NsWfiFZXyqMiZi9zDxXNM7tyf3gDYydfQtNRPyPC K57w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=KivRIFaD; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from morse.vger.email (morse.vger.email. [23.128.96.31]) by mx.google.com with ESMTPS id t21-20020a1709028c9500b001c3e9170068si7977094plo.61.2023.10.24.06.22.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Oct 2023 06:22:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) client-ip=23.128.96.31; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=KivRIFaD; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 3024980A135B; Tue, 24 Oct 2023 06:22:20 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234607AbjJXNWD (ORCPT + 26 others); Tue, 24 Oct 2023 09:22:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44196 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234587AbjJXNVO (ORCPT ); Tue, 24 Oct 2023 09:21:14 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9FDD510C2; Tue, 24 Oct 2023 06:20:56 -0700 (PDT) Date: Tue, 24 Oct 2023 13:20:54 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1698153655; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vw8iqs9QsHpfzltom5MR2q4mLnKifyKOmiEkeG+S3lw=; b=KivRIFaDSOR7ggKVZpynIX7t0yeSQsxyya9TuC3DpNXw5PMwc0m9M3RB6BP1L46v1RLyQz Ejy2HRtHpr3FEkyU8WUi6fYlRSO+koJxSUtRblNIu8+INxmfruUC96Cg985jCRQ9WaskeA 9I4882CfYf6ZooqMs8+lpSnx9Jg/9UbuN3y5ecTkw7ScYwXDPERRClBK8AQJn0r5d7ovg4 MRxJiHPsxGkiBaTToX30GxAeNNRD2xSXnPj47R8vIc9khrPjJzTaRerBBf3/JEle+tYAId 7z4Ch2Tt0FhA2s9lKmld8T+yDSWqyHB1gXM3KEtJINUWXX3QZtZSP5wTxqKAgw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1698153655; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vw8iqs9QsHpfzltom5MR2q4mLnKifyKOmiEkeG+S3lw=; b=O1PJheN8bBG8sCAOVIJWut+bMSC/MtAVNcoyfci9oraJCO+6VgVF2ia4WHYFAXmzi7byq9 Hevtvvf7wBaPnjBw== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/microcode] x86/microcode: Add per CPU control field Cc: Thomas Gleixner , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20231002115903.319959519@linutronix.de> References: <20231002115903.319959519@linutronix.de> MIME-Version: 1.0 Message-ID: <169815365431.3135.1927037057530742543.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Tue, 24 Oct 2023 06:22:20 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778683705325153100 X-GMAIL-MSGID: 1780643262641884432 The following commit has been merged into the x86/microcode branch of tip: Commit-ID: ba3aeb97cb2c53025356f31c5a0a294385194115 Gitweb: https://git.kernel.org/tip/ba3aeb97cb2c53025356f31c5a0a294385194115 Author: Thomas Gleixner AuthorDate: Mon, 02 Oct 2023 14:00:01 +02:00 Committer: Borislav Petkov (AMD) CommitterDate: Tue, 24 Oct 2023 15:05:54 +02:00 x86/microcode: Add per CPU control field Add a per CPU control field to ucode_ctrl and define constants for it which are going to be used to control the loading state machine. In theory this could be a global control field, but a global control does not cover the following case: 15 primary CPUs load microcode successfully 1 primary CPU fails and returns with an error code With global control the sibling of the failed CPU would either try again or the whole operation would be aborted with the consequence that the 15 siblings do not invoke the apply path and end up with inconsistent software state. The result in dmesg would be inconsistent too. There are two additional fields added and initialized: ctrl_cpu and secondaries. ctrl_cpu is the CPU number of the primary thread for now, but with the upcoming uniform loading at package or system scope this will be one CPU per package or just one CPU. Secondaries hands the control CPU a CPU mask which will be required to release the secondary CPUs out of the wait loop. Preparatory change for implementing a properly split control flow for primary and secondary CPUs. Signed-off-by: Thomas Gleixner Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20231002115903.319959519@linutronix.de --- arch/x86/kernel/cpu/microcode/core.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c index 67b8932..001c004 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -252,8 +252,19 @@ static struct platform_device *microcode_pdev; * requirement can be relaxed in the future. Right now, this is conservative * and good. */ +enum sibling_ctrl { + /* Spinwait with timeout */ + SCTRL_WAIT, + /* Invoke the microcode_apply() callback */ + SCTRL_APPLY, + /* Proceed without invoking the microcode_apply() callback */ + SCTRL_DONE, +}; + struct microcode_ctrl { + enum sibling_ctrl ctrl; enum ucode_state result; + unsigned int ctrl_cpu; }; static DEFINE_PER_CPU(struct microcode_ctrl, ucode_ctrl); @@ -398,7 +409,7 @@ static int load_late_stop_cpus(void) */ static bool setup_cpus(void) { - struct microcode_ctrl ctrl = { .result = -1, }; + struct microcode_ctrl ctrl = { .ctrl = SCTRL_WAIT, .result = -1, }; unsigned int cpu; for_each_cpu_and(cpu, cpu_present_mask, &cpus_booted_once_mask) { @@ -408,7 +419,12 @@ static bool setup_cpus(void) return false; } } - /* Initialize the per CPU state */ + + /* + * Initialize the per CPU state. This is core scope for now, + * but prepared to take package or system scope into account. + */ + ctrl.ctrl_cpu = cpumask_first(topology_sibling_cpumask(cpu)); per_cpu(ucode_ctrl, cpu) = ctrl; } return true;