From patchwork Fri Oct 20 11:38:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tip-bot2 for Thomas Gleixner X-Patchwork-Id: 156050 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2010:b0:403:3b70:6f57 with SMTP id fe16csp992102vqb; Fri, 20 Oct 2023 04:41:41 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEzX6dprYGw6DDW8qh3dCMlWPJTxcoFW0RbbT/TuYXdsudzL0JoBIqOSK3K9p5DBm/BJWqG X-Received: by 2002:aa7:9a0e:0:b0:6be:acc:8973 with SMTP id w14-20020aa79a0e000000b006be0acc8973mr1295473pfj.20.1697802101247; Fri, 20 Oct 2023 04:41:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697802101; cv=none; d=google.com; s=arc-20160816; b=fVckikwCySlNvsxHuUBWkJAxQNgpdi2y+wGJYHS/L4A/Z+CQHB15jtX0crL8pcBCUQ HBoiz8pOgrNtHiuU+j7YankYtylEte4q4uzKf519PLrZyO+hNUTyT5WOCWtxoE5I6Tbh 6s5UWHzHMxz4DjNfc+DsndPORkRNxBtwYjPDCwO9smDZNBFUMxn9etHf32h28ks81/Xg 9bIdgCwPhOhqCy3ee0EGd1U4BQwRnOkBuBuKp9mBbXDcNus6FYxmdCT+6Gmh2b6KmZKy vJeljYTnK4raqj8RbfIirWVht0P/754NM08yepY6kqCIHDXs4O8pGpJNXUfZhmtm6eKD +vGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:robot-unsubscribe :robot-id:message-id:mime-version:references:in-reply-to:cc:subject :to:reply-to:sender:from:dkim-signature:dkim-signature:date; bh=sE1yXp9sD9shIhHQnmqJhUlScFe7VM9zewmCWWNFc+E=; fh=LWlv3U+xZ3+vQt4tlJRIlKl5VzN7iFjjE/bzRmlxKDA=; b=M3M8UKMd04S0PfGLyfdjVs6p83whz3hiV0LEu65/fBqAN53GIgN6b1Ni0JGMbDhLIS KVDcWY7noJpJTMio9YCDvwDnw6c/5AZ/W8vPYn41oVzVAQZyB3wgxrC/tgL/rTKMY0ZA JbVxcC55c4cn4TikI3r6ktNZVVNAdSTlnkzEPYff/vhKeeE5rD1wTk/ymj/t+wKPkAxT FGpqATBX+8K09QACE7O/4QNVU4Ny2u/wjUR39kxcx/YNJkHFtFEVvRWQxsFMqyjOrHo+ nkc0HtHMX2UCooprQ+13gOFrQNfLd41pfclewRtMXPM/Z+nBJu4rsX4Ce9Swkr6KP34p RFNA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=jaEx1Nnp; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from agentk.vger.email (agentk.vger.email. [2620:137:e000::3:2]) by mx.google.com with ESMTPS id q38-20020a63f966000000b005b717539930si1638528pgk.749.2023.10.20.04.41.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Oct 2023 04:41:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=jaEx1Nnp; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 1C42781F3D45; Fri, 20 Oct 2023 04:41:34 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377491AbjJTLkv (ORCPT + 25 others); Fri, 20 Oct 2023 07:40:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377335AbjJTLkN (ORCPT ); Fri, 20 Oct 2023 07:40:13 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0321E1737; Fri, 20 Oct 2023 04:38:39 -0700 (PDT) Date: Fri, 20 Oct 2023 11:38:03 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1697801884; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sE1yXp9sD9shIhHQnmqJhUlScFe7VM9zewmCWWNFc+E=; b=jaEx1Nnpwa77Nx/RQnuL0Px0Qp8+s6wn+if4fzrKDcMQK/tZS1XWpZF0uJ2RGnUSHcA6Sc jsa54qaHAL/is2GBWv9F0EQSRPTK2h/FHi2GCtbLJd/v5Vh8s6qScJYUydQejrH+9w+QSY C4mvlRDlOULDvYtgk+/7NubvVY/Cdm6mGBkcXkHhLtG7UTWgJLcp3UwRMfggD0Fm2lyrpJ EmtMXCHTadMJ/0XQhr8zn/EgkmuZrxIPWzA5afISU7ZtFM4ZwHHeUhhkUwTbhI0+ix2RZT VswvopoXJKIdHgjrYx3LhN55kw0rNnMSGnPaXoVR8fgt3pP/dsgiqCv5DaDT8Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1697801884; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sE1yXp9sD9shIhHQnmqJhUlScFe7VM9zewmCWWNFc+E=; b=Zv9HdNN6eWXBVqAWOQgdVuYijAQpS4+cN1W40MOAkr3oZ8hPNZS2zJH92I/YjKLulI/04l 7UY27JcbXWl8AMAg== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/microcode] x86/boot/32: Temporarily map initrd for microcode loading Cc: Thomas Gleixner , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20231017211722.292291436@linutronix.de> References: <20231017211722.292291436@linutronix.de> MIME-Version: 1.0 Message-ID: <169780188328.3135.2756882878941011371.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Fri, 20 Oct 2023 04:41:34 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780039412005286727 X-GMAIL-MSGID: 1780274535752894050 The following commit has been merged into the x86/microcode branch of tip: Commit-ID: 4c585af7180c147062c636a927a2fc2b6a7072f5 Gitweb: https://git.kernel.org/tip/4c585af7180c147062c636a927a2fc2b6a7072f5 Author: Thomas Gleixner AuthorDate: Tue, 17 Oct 2023 23:23:31 +02:00 Committer: Borislav Petkov (AMD) CommitterDate: Wed, 18 Oct 2023 18:28:41 +02:00 x86/boot/32: Temporarily map initrd for microcode loading Early microcode loading on 32-bit runs in physical address mode because the initrd is not covered by the initial page tables. That results in a horrible mess all over the microcode loader code. Provide a temporary mapping for the initrd in the initial page tables by appending it to the actual initial mapping starting with a new PGD or PMD depending on the configured page table levels ([non-]PAE). The page table entries are located after _brk_end so they are not permanently using memory space. The mapping is invalidated right away in i386_start_kernel() after the early microcode loader has run. This prepares for removing the physical address mode oddities from all over the microcode loader code, which in turn allows further cleanups. Provide the map and unmap code and document the place where the microcode loader needs to be invoked with a comment. Signed-off-by: Thomas Gleixner Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20231017211722.292291436@linutronix.de --- arch/x86/include/asm/microcode.h | 2 +- arch/x86/kernel/head32.c | 54 +++++++++++++++++++++++++++++-- 2 files changed, 54 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h index bbbe9d7..5216bf1 100644 --- a/arch/x86/include/asm/microcode.h +++ b/arch/x86/include/asm/microcode.h @@ -23,6 +23,8 @@ static inline void load_ucode_ap(void) { } static inline void microcode_bsp_resume(void) { } #endif +extern unsigned long initrd_start_early; + #ifdef CONFIG_CPU_SUP_INTEL /* Intel specific microcode defines. Public for IFS */ struct microcode_header_intel { diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c index bdce632..abdbfd3 100644 --- a/arch/x86/kernel/head32.c +++ b/arch/x86/kernel/head32.c @@ -29,11 +29,33 @@ static void __init i386_default_early_setup(void) x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc; } +#ifdef CONFIG_MICROCODE_INITRD32 +unsigned long __initdata initrd_start_early; +static pte_t __initdata *initrd_pl2p_start, *initrd_pl2p_end; + +static void zap_early_initrd_mapping(void) +{ + pte_t *pl2p = initrd_pl2p_start; + + for (; pl2p < initrd_pl2p_end; pl2p++) { + *pl2p = (pte_t){ .pte = 0 }; + + if (!IS_ENABLED(CONFIG_X86_PAE)) + *(pl2p + ((PAGE_OFFSET >> PGDIR_SHIFT))) = (pte_t) {.pte = 0}; + } +} +#else +static inline void zap_early_initrd_mapping(void) { } +#endif + asmlinkage __visible void __init __noreturn i386_start_kernel(void) { /* Make sure IDT is set up before any exception happens */ idt_setup_early_handler(); + /* load_ucode_bsp() */ + zap_early_initrd_mapping(); + cr4_init_shadow(); sanitize_boot_params(&boot_params); @@ -105,9 +127,9 @@ static __init __no_stack_protector pte_t init_map(pte_t pte, pte_t **ptep, pl2_t void __init __no_stack_protector mk_early_pgtbl_32(void) { /* Enough space to fit pagetables for the low memory linear map */ - const unsigned long limit = __pa_nodebug(_end) + - (PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT); + unsigned long limit = __pa_nodebug(_end) + (PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT); pte_t pte, *ptep = (pte_t *)__pa_nodebug(__brk_base); + struct boot_params __maybe_unused *params; pl2_t *pl2p = (pl2_t *)__pa_nodebug(pl2_base); unsigned long *ptr; @@ -120,4 +142,32 @@ void __init __no_stack_protector mk_early_pgtbl_32(void) ptr = (unsigned long *)__pa_nodebug(&_brk_end); *ptr = (unsigned long)ptep + PAGE_OFFSET; + +#ifdef CONFIG_MICROCODE_INITRD32 + /* Running on a hypervisor? */ + if (native_cpuid_ecx(1) & BIT(31)) + return; + + params = (struct boot_params *)__pa_nodebug(&boot_params); + if (!params->hdr.ramdisk_size || !params->hdr.ramdisk_image) + return; + + /* Save the virtual start address */ + ptr = (unsigned long *)__pa_nodebug(&initrd_start_early); + *ptr = (pte.pte & PTE_PFN_MASK) + PAGE_OFFSET; + *ptr += ((unsigned long)params->hdr.ramdisk_image) & ~PAGE_MASK; + + /* Save PLP2 for cleanup */ + ptr = (unsigned long *)__pa_nodebug(&initrd_pl2p_start); + *ptr = (unsigned long)pl2p + PAGE_OFFSET; + + limit = (unsigned long)params->hdr.ramdisk_image; + pte.pte = PTE_IDENT_ATTR | PFN_ALIGN(limit); + limit = (unsigned long)params->hdr.ramdisk_image + params->hdr.ramdisk_size; + + init_map(pte, &ptep, &pl2p, limit); + + ptr = (unsigned long *)__pa_nodebug(&initrd_pl2p_end); + *ptr = (unsigned long)pl2p + PAGE_OFFSET; +#endif }