From patchwork Fri Oct 20 11:38:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tip-bot2 for Thomas Gleixner X-Patchwork-Id: 156048 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2010:b0:403:3b70:6f57 with SMTP id fe16csp991940vqb; Fri, 20 Oct 2023 04:41:19 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG8nwmaxYW3+9X2N9EKI7W//mjvRA1NHW216AfUgkEIf5etv78G7IU+ZzjKggNoGp3ezXkB X-Received: by 2002:a05:6358:9101:b0:141:8c:75ad with SMTP id q1-20020a056358910100b00141008c75admr1646747rwq.28.1697802079623; Fri, 20 Oct 2023 04:41:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697802079; cv=none; d=google.com; s=arc-20160816; b=DhfioyiZ2/njWJRsYjI4gUzPiLZ9PWNkSW5FlFiqckRoUZT3KYguOvwh0EU04qRBdW EtCTovcAckrScNkclqoNrMcxJO75tAnxrXRfKHYVw7H8Prf5AxNIa5m4EhaqHEVYdml1 ozMNGQEgN7IJi6MvpNxp7eKd6mpA1R0P3yVRdaTqyzQQtw1xUpKl7jQiVQtVVQ2e6E78 NyVgaYi0ZHqIG7ISF5ahHz1ELmcTnbJJ9eEElITDmBo+idevuZUjs1XPQkrO4QhoEpKc hduzs9vkcrQAmwwm5ilOpgH0zgiJfPntc+dtwPKkkM5TnQ661aRSSpLG60z8uHudts/M e3AA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:robot-unsubscribe :robot-id:message-id:mime-version:references:in-reply-to:cc:subject :to:reply-to:sender:from:dkim-signature:dkim-signature:date; bh=4Z+Xf1HWij3PGSMHsuadRrHlnMgQr68v7RxfDYbFLiI=; fh=LWlv3U+xZ3+vQt4tlJRIlKl5VzN7iFjjE/bzRmlxKDA=; b=Pk5uOzXlqDXslVU0kNdbKANsUGfOx5ms+DqL/8uYoEYN2teRtEOnzmsiFhXxdfKcwK iL1R4aO1dtR8Pc3O80GBcr3l/zABK8R1iIbx14iMmkNhRdUH2JaYXjnkweduUphLw/AY IE2wXPRZshujVyS3vf+lgec56MTvCKjCerbR6utIo/ryn3VJmQMvqJ4aJPuRybpYTxrR SJ1f78hymijw4CrKb2PDEQacZ625bylPkckQqLfvhFSg7MCQW6b2jVHjIOK7Nz5zYrnD KdGCt3mcv9To+vHMeAtZ4Vom9LGl/GKoP8PH7hrqcTUZQl5Ci1kieH9K3rj/g7QQryrr qoow== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="Sk/P9pXt"; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from agentk.vger.email (agentk.vger.email. [2620:137:e000::3:2]) by mx.google.com with ESMTPS id d20-20020a056a00199400b006bdfb718e04si1771097pfl.338.2023.10.20.04.41.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Oct 2023 04:41:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="Sk/P9pXt"; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id E74C981F3D58; Fri, 20 Oct 2023 04:41:11 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377342AbjJTLkc (ORCPT + 25 others); Fri, 20 Oct 2023 07:40:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43750 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377218AbjJTLkK (ORCPT ); Fri, 20 Oct 2023 07:40:10 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A7F2E2D50; Fri, 20 Oct 2023 04:38:33 -0700 (PDT) Date: Fri, 20 Oct 2023 11:38:00 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1697801881; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4Z+Xf1HWij3PGSMHsuadRrHlnMgQr68v7RxfDYbFLiI=; b=Sk/P9pXtsIGKI4iKp1fuXqdGyYzDVwxgG09G1EOYDicNdrhIDKOYLEfbOF79+WMgQYyCXj EfoLMPaqvQCj6duED/Z8y1eGcOBc9wfEAfGucSUpNFiMcVH2LbjKbNZkl6CrbnH3gGJ5Uw VvTtvj9xNIj4o3JRBZIIUont4r8WJzXIFepbXSrOKIIM75qw+ptPgYtMG4xoB2w9XpzNpm aKPxfNE2LvjNCXNdJbvNfhALBETSAdoFXzUpVUg3PcEn9/WPDQPdNtkt2nPhHr4KBid4EJ fkhGGj8NvvyUg4uekz04bCckDrhr/c3yftO+pqMUbsapOOnFW1tA2TTb9IJh1g== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1697801881; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4Z+Xf1HWij3PGSMHsuadRrHlnMgQr68v7RxfDYbFLiI=; b=g6XrqxK7F+omBPEcq9yLmWC/r9YCZ0X/h5y2BjE0M3/bGymbmK/r8u7eVLWCkwvzGMwQaN Em+Ced4itRzrXuCA== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/microcode] x86/microcode/intel: Cleanup code further Cc: Thomas Gleixner , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20231002115902.389400871@linutronix.de> References: <20231002115902.389400871@linutronix.de> MIME-Version: 1.0 Message-ID: <169780188065.3135.7928004054471571540.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Fri, 20 Oct 2023 04:41:12 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778665501426411272 X-GMAIL-MSGID: 1780274513065169538 The following commit has been merged into the x86/microcode branch of tip: Commit-ID: 0177669ee61de4dc641f9ad86a3df6f22327cf6c Gitweb: https://git.kernel.org/tip/0177669ee61de4dc641f9ad86a3df6f22327cf6c Author: Thomas Gleixner AuthorDate: Mon, 02 Oct 2023 13:59:41 +02:00 Committer: Borislav Petkov (AMD) CommitterDate: Thu, 19 Oct 2023 14:10:50 +02:00 x86/microcode/intel: Cleanup code further Sanitize the microcode scan loop, fixup printks and move the loading function for builtin microcode next to the place where it is used and mark it __init. Signed-off-by: Thomas Gleixner Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20231002115902.389400871@linutronix.de --- arch/x86/kernel/cpu/microcode/intel.c | 76 ++++++++++---------------- 1 file changed, 32 insertions(+), 44 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index 9463b14..d6ff6eb 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -36,7 +36,7 @@ static const char ucode_path[] = "kernel/x86/microcode/GenuineIntel.bin"; static struct microcode_intel *intel_ucode_patch __read_mostly; /* last level cache size per core */ -static int llc_size_per_core __ro_after_init; +static unsigned int llc_size_per_core __ro_after_init; /* microcode format is extended from prescott processors */ struct extended_signature { @@ -294,29 +294,6 @@ static struct microcode_intel *scan_microcode(void *data, size_t size, return patch; } -static bool load_builtin_intel_microcode(struct cpio_data *cp) -{ - unsigned int eax = 1, ebx, ecx = 0, edx; - struct firmware fw; - char name[30]; - - if (IS_ENABLED(CONFIG_X86_32)) - return false; - - native_cpuid(&eax, &ebx, &ecx, &edx); - - sprintf(name, "intel-ucode/%02x-%02x-%02x", - x86_family(eax), x86_model(eax), x86_stepping(eax)); - - if (firmware_request_builtin(&fw, name)) { - cp->size = fw.size; - cp->data = (void *)fw.data; - return true; - } - - return false; -} - static int apply_microcode_early(struct ucode_cpu_info *uci) { struct microcode_intel *mc; @@ -360,6 +337,28 @@ static int apply_microcode_early(struct ucode_cpu_info *uci) return 0; } +static bool load_builtin_intel_microcode(struct cpio_data *cp) +{ + unsigned int eax = 1, ebx, ecx = 0, edx; + struct firmware fw; + char name[30]; + + if (IS_ENABLED(CONFIG_X86_32)) + return false; + + native_cpuid(&eax, &ebx, &ecx, &edx); + + sprintf(name, "intel-ucode/%02x-%02x-%02x", + x86_family(eax), x86_model(eax), x86_stepping(eax)); + + if (firmware_request_builtin(&fw, name)) { + cp->size = fw.size; + cp->data = (void *)fw.data; + return true; + } + return false; +} + int __init save_microcode_in_initrd_intel(void) { struct ucode_cpu_info uci; @@ -432,25 +431,16 @@ void load_ucode_intel_ap(void) apply_microcode_early(&uci); } -/* Accessor for microcode pointer */ -static struct microcode_intel *ucode_get_patch(void) -{ - return intel_ucode_patch; -} - void reload_ucode_intel(void) { - struct microcode_intel *p; struct ucode_cpu_info uci; intel_cpu_collect_info(&uci); - p = ucode_get_patch(); - if (!p) + uci.mc = intel_ucode_patch; + if (!uci.mc) return; - uci.mc = p; - apply_microcode_early(&uci); } @@ -488,8 +478,7 @@ static enum ucode_state apply_microcode_intel(int cpu) if (WARN_ON(raw_smp_processor_id() != cpu)) return UCODE_ERROR; - /* Look for a newer patch in our cache: */ - mc = ucode_get_patch(); + mc = intel_ucode_patch; if (!mc) { mc = uci->mc; if (!mc) @@ -680,18 +669,17 @@ static enum ucode_state request_microcode_fw(int cpu, struct device *device) } static struct microcode_ops microcode_intel_ops = { - .request_microcode_fw = request_microcode_fw, - .collect_cpu_info = collect_cpu_info, - .apply_microcode = apply_microcode_intel, + .request_microcode_fw = request_microcode_fw, + .collect_cpu_info = collect_cpu_info, + .apply_microcode = apply_microcode_intel, }; -static int __init calc_llc_size_per_core(struct cpuinfo_x86 *c) +static __init void calc_llc_size_per_core(struct cpuinfo_x86 *c) { u64 llc_size = c->x86_cache_size * 1024ULL; do_div(llc_size, c->x86_max_cores); - - return (int)llc_size; + llc_size_per_core = (unsigned int)llc_size; } struct microcode_ops * __init init_intel_microcode(void) @@ -704,7 +692,7 @@ struct microcode_ops * __init init_intel_microcode(void) return NULL; } - llc_size_per_core = calc_llc_size_per_core(c); + calc_llc_size_per_core(c); return µcode_intel_ops; }