Message ID | 1697715430-30820-3-git-send-email-quic_msarkar@quicinc.com |
---|---|
State | New |
Headers |
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Series |
arm64: qcom: sa8775p: add support for EP PCIe
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Commit Message
Mrinmay Sarkar
Oct. 19, 2023, 11:37 a.m. UTC
Add support for SA8775P SoC to the Qualcomm PCIe Endpoint Controller
driver. There will be some change specific to SA8775P so adding new
compatible string.
Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
---
drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 +
1 file changed, 1 insertion(+)
Comments
On Thu, Oct 19, 2023 at 05:07:07PM +0530, Mrinmay Sarkar wrote: > Add support for SA8775P SoC to the Qualcomm PCIe Endpoint Controller > driver. There will be some change specific to SA8775P so adding new > compatible string. > What are those specific changes? - Mani > Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> > --- > drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c > index 32c8d9e..4c01c34 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c > +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c > @@ -858,6 +858,7 @@ static void qcom_pcie_ep_remove(struct platform_device *pdev) > } > > static const struct of_device_id qcom_pcie_ep_match[] = { > + { .compatible = "qcom,sa8775p-pcie-ep", }, > { .compatible = "qcom,sdx55-pcie-ep", }, > { .compatible = "qcom,sm8450-pcie-ep", }, > { } > -- > 2.7.4 >
On 10/25/2023 1:23 PM, Manivannan Sadhasivam wrote: > On Thu, Oct 19, 2023 at 05:07:07PM +0530, Mrinmay Sarkar wrote: >> Add support for SA8775P SoC to the Qualcomm PCIe Endpoint Controller >> driver. There will be some change specific to SA8775P so adding new >> compatible string. >> > What are those specific changes? > > - Mani Need to enable cache snooping logic for SA8775P only. --Mrinmay >> Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> >> --- >> drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c >> index 32c8d9e..4c01c34 100644 >> --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c >> +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c >> @@ -858,6 +858,7 @@ static void qcom_pcie_ep_remove(struct platform_device *pdev) >> } >> >> static const struct of_device_id qcom_pcie_ep_match[] = { >> + { .compatible = "qcom,sa8775p-pcie-ep", }, >> { .compatible = "qcom,sdx55-pcie-ep", }, >> { .compatible = "qcom,sm8450-pcie-ep", }, >> { } >> -- >> 2.7.4 >>
On Thu, Oct 26, 2023 at 11:08:03AM +0530, Mrinmay Sarkar wrote: > > On 10/25/2023 1:23 PM, Manivannan Sadhasivam wrote: > > On Thu, Oct 19, 2023 at 05:07:07PM +0530, Mrinmay Sarkar wrote: > > > Add support for SA8775P SoC to the Qualcomm PCIe Endpoint Controller > > > driver. There will be some change specific to SA8775P so adding new > > > compatible string. > > > > > What are those specific changes? > > > > - Mani > > Need to enable cache snooping logic for SA8775P only. > Then you can add the compatible to the driver at that time and use the fallback till then i.e., just document the SA8775P compatible in bindings and use both SA8775P and SM8450 compatibles in the dts where the latter will act as a fallback. - Mani > --Mrinmay > > > > Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> > > > --- > > > drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + > > > 1 file changed, 1 insertion(+) > > > > > > diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c > > > index 32c8d9e..4c01c34 100644 > > > --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c > > > +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c > > > @@ -858,6 +858,7 @@ static void qcom_pcie_ep_remove(struct platform_device *pdev) > > > } > > > static const struct of_device_id qcom_pcie_ep_match[] = { > > > + { .compatible = "qcom,sa8775p-pcie-ep", }, > > > { .compatible = "qcom,sdx55-pcie-ep", }, > > > { .compatible = "qcom,sm8450-pcie-ep", }, > > > { } > > > -- > > > 2.7.4 > > >
On 10/26/2023 11:40 AM, Manivannan Sadhasivam wrote: > On Thu, Oct 26, 2023 at 11:08:03AM +0530, Mrinmay Sarkar wrote: >> On 10/25/2023 1:23 PM, Manivannan Sadhasivam wrote: >>> On Thu, Oct 19, 2023 at 05:07:07PM +0530, Mrinmay Sarkar wrote: >>>> Add support for SA8775P SoC to the Qualcomm PCIe Endpoint Controller >>>> driver. There will be some change specific to SA8775P so adding new >>>> compatible string. >>>> >>> What are those specific changes? >>> >>> - Mani >> Need to enable cache snooping logic for SA8775P only. >> > Then you can add the compatible to the driver at that time and use the fallback > till then i.e., just document the SA8775P compatible in bindings and use both > SA8775P and SM8450 compatibles in the dts where the latter will act as a > fallback. > > - Mani I am getting below error in dtb checking if I add SM8450 as fallback compatible in dtsi. As both has different set of clocks. //local/mnt/workspace/Mrinmay/new_lemans/next-20231018/linux-next/out/arch/arm64/boot/dts/qcom/sa8775p-ride.dtb: pcie-ep@1c00000: compatible: 'oneOf' conditional failed, one must be fixed:// // ['qcom,sa8775p-pcie-ep', 'qcom,sm8450-pcie-ep'] is too long// // 'qcom,sdx65-pcie-ep' was expected// // 'qcom,sdx55-pcie-ep' was expected// // from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#// ///local/mnt/workspace/Mrinmay/new_lemans/next-20231018/linux-next/out/arch/arm64/boot/dts/qcom/sa8775p-ride.dtb: pcie-ep@1c00000: clocks: [[31, 66], [31, 68], [31, 69], [31, 78], [31, 79]] is too short// // from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#// ///local/mnt/workspace/Mrinmay/new_lemans/next-20231018/linux-next/out/arch/arm64/boot/dts/qcom/sa8775p-ride.dtb: pcie-ep@1c00000: clock-names: ['aux', 'cfg', 'bus_master', 'bus_slave', 'slave_q2a'] is too short/ >> --Mrinmay >> >>>> Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> >>>> --- >>>> drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + >>>> 1 file changed, 1 insertion(+) >>>> >>>> diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c >>>> index 32c8d9e..4c01c34 100644 >>>> --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c >>>> +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c >>>> @@ -858,6 +858,7 @@ static void qcom_pcie_ep_remove(struct platform_device *pdev) >>>> } >>>> static const struct of_device_id qcom_pcie_ep_match[] = { >>>> + { .compatible = "qcom,sa8775p-pcie-ep", }, >>>> { .compatible = "qcom,sdx55-pcie-ep", }, >>>> { .compatible = "qcom,sm8450-pcie-ep", }, >>>> { } >>>> -- >>>> 2.7.4 >>>>
On Thu, Oct 26, 2023 at 12:29:30PM +0530, Mrinmay Sarkar wrote: > > On 10/26/2023 11:40 AM, Manivannan Sadhasivam wrote: > > On Thu, Oct 26, 2023 at 11:08:03AM +0530, Mrinmay Sarkar wrote: > > > On 10/25/2023 1:23 PM, Manivannan Sadhasivam wrote: > > > > On Thu, Oct 19, 2023 at 05:07:07PM +0530, Mrinmay Sarkar wrote: > > > > > Add support for SA8775P SoC to the Qualcomm PCIe Endpoint Controller > > > > > driver. There will be some change specific to SA8775P so adding new > > > > > compatible string. > > > > > > > > > What are those specific changes? > > > > > > > > - Mani > > > Need to enable cache snooping logic for SA8775P only. > > > > > Then you can add the compatible to the driver at that time and use the fallback > > till then i.e., just document the SA8775P compatible in bindings and use both > > SA8775P and SM8450 compatibles in the dts where the latter will act as a > > fallback. > > > > - Mani > > I am getting below error in dtb checking if I add SM8450 as fallback > compatible in dtsi. As both has different set of clocks. > Ok. I didn't realize that the clocks are different. In that case, you need to mention it in the commit message to make it clear and introduce a new compatible. - Mani > //local/mnt/workspace/Mrinmay/new_lemans/next-20231018/linux-next/out/arch/arm64/boot/dts/qcom/sa8775p-ride.dtb: > pcie-ep@1c00000: compatible: 'oneOf' conditional failed, one must be > fixed:// > // ['qcom,sa8775p-pcie-ep', 'qcom,sm8450-pcie-ep'] is too long// > // 'qcom,sdx65-pcie-ep' was expected// > // 'qcom,sdx55-pcie-ep' was expected// > // from schema $id: > http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#// > ///local/mnt/workspace/Mrinmay/new_lemans/next-20231018/linux-next/out/arch/arm64/boot/dts/qcom/sa8775p-ride.dtb: > pcie-ep@1c00000: clocks: [[31, 66], [31, 68], [31, 69], [31, 78], [31, 79]] > is too short// > // from schema $id: > http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#// > ///local/mnt/workspace/Mrinmay/new_lemans/next-20231018/linux-next/out/arch/arm64/boot/dts/qcom/sa8775p-ride.dtb: > pcie-ep@1c00000: clock-names: ['aux', 'cfg', 'bus_master', 'bus_slave', > 'slave_q2a'] is too short/ > > > > --Mrinmay > > > > > > > > Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> > > > > > --- > > > > > drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + > > > > > 1 file changed, 1 insertion(+) > > > > > > > > > > diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c > > > > > index 32c8d9e..4c01c34 100644 > > > > > --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c > > > > > +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c > > > > > @@ -858,6 +858,7 @@ static void qcom_pcie_ep_remove(struct platform_device *pdev) > > > > > } > > > > > static const struct of_device_id qcom_pcie_ep_match[] = { > > > > > + { .compatible = "qcom,sa8775p-pcie-ep", }, > > > > > { .compatible = "qcom,sdx55-pcie-ep", }, > > > > > { .compatible = "qcom,sm8450-pcie-ep", }, > > > > > { } > > > > > -- > > > > > 2.7.4 > > > > >
diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 32c8d9e..4c01c34 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -858,6 +858,7 @@ static void qcom_pcie_ep_remove(struct platform_device *pdev) } static const struct of_device_id qcom_pcie_ep_match[] = { + { .compatible = "qcom,sa8775p-pcie-ep", }, { .compatible = "qcom,sdx55-pcie-ep", }, { .compatible = "qcom,sm8450-pcie-ep", }, { }