diff mbox series

[1/8] arm64: dts: qcom: sdx75: Add spmi node

Message ID 1690970366-30982-2-git-send-email-quic_rohiagar@quicinc.com
State New
Headers
Series Add pmics supported in Qualcomm's SDX75 platform |

Commit Message

Rohit Agarwal Aug. 2, 2023, 9:59 a.m. UTC 
  Add SPMI node to SDX75 dtsi.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sdx75.dtsi | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

Comments

Konrad Dybcio Aug. 2, 2023, 12:40 p.m. UTC | #1 
On 2.08.2023 11:59, Rohit Agarwal wrote:
> Add SPMI node to SDX75 dtsi.
> 
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sdx75.dtsi | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
> index 21d5d55..5e9602cd 100644
> --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
> @@ -469,6 +469,29 @@
>  			interrupt-controller;
>  		};
>  
> +		spmi_bus: spmi@c400000 {
> +			compatible = "qcom,spmi-pmic-arb";
> +			reg = <0x0 0xc400000 0x0 0x3000>,
> +			      <0x0 0xc500000 0x0 0x400000>,
> +			      <0x0 0xc440000 0x0 0x80000>,
> +			      <0x0 0xc4c0000 0x0 0x10000>,
> +			      <0x0 0xc42d000 0x0 0x4000>;
Please pad the address part to 8 hex digits (add leading zeroes)

Konrad
Rohit Agarwal Aug. 2, 2023, 1:07 p.m. UTC | #2 
On 8/2/2023 6:10 PM, Konrad Dybcio wrote:
> On 2.08.2023 11:59, Rohit Agarwal wrote:
>> Add SPMI node to SDX75 dtsi.
>>
>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sdx75.dtsi | 23 +++++++++++++++++++++++
>>   1 file changed, 23 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
>> index 21d5d55..5e9602cd 100644
>> --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
>> @@ -469,6 +469,29 @@
>>   			interrupt-controller;
>>   		};
>>   
>> +		spmi_bus: spmi@c400000 {
>> +			compatible = "qcom,spmi-pmic-arb";
>> +			reg = <0x0 0xc400000 0x0 0x3000>,
>> +			      <0x0 0xc500000 0x0 0x400000>,
>> +			      <0x0 0xc440000 0x0 0x80000>,
>> +			      <0x0 0xc4c0000 0x0 0x10000>,
>> +			      <0x0 0xc42d000 0x0 0x4000>;
> Please pad the address part to 8 hex digits (add leading zeroes)
Sure will update this.
Thanks,
Rohit.
>
> Konrad
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index 21d5d55..5e9602cd 100644
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -469,6 +469,29 @@ 
 			interrupt-controller;
 		};
 
+		spmi_bus: spmi@c400000 {
+			compatible = "qcom,spmi-pmic-arb";
+			reg = <0x0 0xc400000 0x0 0x3000>,
+			      <0x0 0xc500000 0x0 0x400000>,
+			      <0x0 0xc440000 0x0 0x80000>,
+			      <0x0 0xc4c0000 0x0 0x10000>,
+			      <0x0 0xc42d000 0x0 0x4000>;
+			reg-names = "core",
+				    "chnls",
+				    "obsrvr",
+				    "intr",
+				    "cnfg";
+			interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "periph_irq";
+			qcom,ee = <0>;
+			qcom,channel = <0>;
+			qcom,bus-id = <0>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			interrupt-controller;
+			#interrupt-cells = <4>;
+		};
+
 		tlmm: pinctrl@f000000 {
 			compatible = "qcom,sdx75-tlmm";
 			reg = <0x0 0x0f000000 0x0 0x400000>;