Message ID | 1682586037-25973-5-git-send-email-quic_taozha@quicinc.com |
---|---|
State | New |
Headers |
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Thu, 27 Apr 2023 09:01:18 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 33R91Hf7013429 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 27 Apr 2023 09:01:17 GMT Received: from taozha-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Thu, 27 Apr 2023 02:01:11 -0700 From: Tao Zhang <quic_taozha@quicinc.com> To: Mathieu Poirier <mathieu.poirier@linaro.org>, Suzuki K Poulose <suzuki.poulose@arm.com>, Alexander Shishkin <alexander.shishkin@linux.intel.com>, Konrad Dybcio <konradybcio@gmail.com>, Mike Leach <mike.leach@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> CC: Tao Zhang <quic_taozha@quicinc.com>, Jinlong Mao <quic_jinlmao@quicinc.com>, Leo Yan <leo.yan@linaro.org>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, <coresight@lists.linaro.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, Tingwei Zhang <quic_tingweiz@quicinc.com>, Yuanfang Zhang <quic_yuanfang@quicinc.com>, Trilok Soni <quic_tsoni@quicinc.com>, Hao Zhang <quic_hazha@quicinc.com>, <linux-arm-msm@vger.kernel.org>, <andersson@kernel.org> Subject: [PATCH v4 04/11] coresight-tpdm: Add reset node to TPDM node Date: Thu, 27 Apr 2023 17:00:30 +0800 Message-ID: <1682586037-25973-5-git-send-email-quic_taozha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1682586037-25973-1-git-send-email-quic_taozha@quicinc.com> References: <1682586037-25973-1-git-send-email-quic_taozha@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 6Uj9_HTXDx2Q5-q7SKj9oLD679iTT6jl X-Proofpoint-ORIG-GUID: 6Uj9_HTXDx2Q5-q7SKj9oLD679iTT6jl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-27_06,2023-04-26_03,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 priorityscore=1501 malwarescore=0 lowpriorityscore=0 bulkscore=0 mlxscore=0 suspectscore=0 impostorscore=0 spamscore=0 adultscore=0 clxscore=1015 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304270078 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764320075244306167?= X-GMAIL-MSGID: =?utf-8?q?1764320075244306167?= |
Series |
Add support to configure TPDM DSB subunit
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Commit Message
Tao Zhang
April 27, 2023, 9 a.m. UTC
TPDM device need a node to reset the configurations and status of
it. This change provides a node to reset the configurations and
disable the TPDM if it has been enabled.
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
---
.../ABI/testing/sysfs-bus-coresight-devices-tpdm | 10 ++++++++
drivers/hwtracing/coresight/coresight-tpdm.c | 27 ++++++++++++++++++++++
2 files changed, 37 insertions(+)
Comments
On 27/04/2023 10:00, Tao Zhang wrote: > TPDM device need a node to reset the configurations and status of > it. This change provides a node to reset the configurations and > disable the TPDM if it has been enabled. > > Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> > --- > .../ABI/testing/sysfs-bus-coresight-devices-tpdm | 10 ++++++++ > drivers/hwtracing/coresight/coresight-tpdm.c | 27 ++++++++++++++++++++++ > 2 files changed, 37 insertions(+) > > diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm > index 4a58e64..686bdde 100644 > --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm > +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm > @@ -11,3 +11,13 @@ Description: > Accepts only one of the 2 values - 1 or 2. > 1 : Generate 64 bits data > 2 : Generate 32 bits data > + > +What: /sys/bus/coresight/devices/<tpdm-name>/reset > +Date: March 2023 > +KernelVersion 6.3 > +Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> > +Description: > + (Write) Reset the dataset of the tpdm, and disable the tpdm. > + > + Accepts only one value - 1. > + 1 : Reset the dataset of the tpdm > diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c > index 6f8a8ab..2e64cfd 100644 > --- a/drivers/hwtracing/coresight/coresight-tpdm.c > +++ b/drivers/hwtracing/coresight/coresight-tpdm.c > @@ -164,6 +164,32 @@ static int tpdm_datasets_setup(struct tpdm_drvdata *drvdata) > return 0; > } > > +static ssize_t reset_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, > + size_t size) > +{ > + int ret = 0; > + unsigned long val; > + struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); > + > + ret = kstrtoul(buf, 10, &val); > + if (ret || val != 1) > + return -EINVAL; > + > + spin_lock(&drvdata->spinlock); > + tpdm_reset_datasets(drvdata); > + > + spin_unlock(&drvdata->spinlock); > + > + /* Disable tpdm if enabled */ > + if (drvdata->enable) > + coresight_disable_source(drvdata->csdev, NULL); I am not really keen on doing this behind the back. What about the path of components ? We could simply reject the request when the TPDA is enabled and let the user alway follow : 1) Disable the TPDM manually via sysfs 2) Reset the TPDM. So, please remove the disable step here. Suzuki > + > + return size; > +} > +static DEVICE_ATTR_WO(reset); > + > /* > * value 1: 64 bits test data > * value 2: 32 bits test data > @@ -204,6 +230,7 @@ static ssize_t integration_test_store(struct device *dev, > static DEVICE_ATTR_WO(integration_test); > > static struct attribute *tpdm_attrs[] = { > + &dev_attr_reset.attr, > &dev_attr_integration_test.attr, > NULL, > };
On 5/23/2023 10:53 PM, Suzuki K Poulose wrote: > On 27/04/2023 10:00, Tao Zhang wrote: >> TPDM device need a node to reset the configurations and status of >> it. This change provides a node to reset the configurations and >> disable the TPDM if it has been enabled. >> >> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> >> --- >> .../ABI/testing/sysfs-bus-coresight-devices-tpdm | 10 ++++++++ >> drivers/hwtracing/coresight/coresight-tpdm.c | 27 >> ++++++++++++++++++++++ >> 2 files changed, 37 insertions(+) >> >> diff --git >> a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm >> b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm >> index 4a58e64..686bdde 100644 >> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm >> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm >> @@ -11,3 +11,13 @@ Description: >> Accepts only one of the 2 values - 1 or 2. >> 1 : Generate 64 bits data >> 2 : Generate 32 bits data >> + >> +What: /sys/bus/coresight/devices/<tpdm-name>/reset >> +Date: March 2023 >> +KernelVersion 6.3 >> +Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang >> (QUIC) <quic_taozha@quicinc.com> >> +Description: >> + (Write) Reset the dataset of the tpdm, and disable the tpdm. >> + >> + Accepts only one value - 1. >> + 1 : Reset the dataset of the tpdm >> diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c >> b/drivers/hwtracing/coresight/coresight-tpdm.c >> index 6f8a8ab..2e64cfd 100644 >> --- a/drivers/hwtracing/coresight/coresight-tpdm.c >> +++ b/drivers/hwtracing/coresight/coresight-tpdm.c >> @@ -164,6 +164,32 @@ static int tpdm_datasets_setup(struct >> tpdm_drvdata *drvdata) >> return 0; >> } >> +static ssize_t reset_store(struct device *dev, >> + struct device_attribute *attr, >> + const char *buf, >> + size_t size) >> +{ >> + int ret = 0; >> + unsigned long val; >> + struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); >> + >> + ret = kstrtoul(buf, 10, &val); >> + if (ret || val != 1) >> + return -EINVAL; >> + >> + spin_lock(&drvdata->spinlock); >> + tpdm_reset_datasets(drvdata); >> + >> + spin_unlock(&drvdata->spinlock); >> + >> + /* Disable tpdm if enabled */ >> + if (drvdata->enable) >> + coresight_disable_source(drvdata->csdev, NULL); > > I am not really keen on doing this behind the back. What about the > path of components ? We could simply reject the request when the TPDA > is enabled and let the user alway follow : > 1) Disable the TPDM manually via sysfs > 2) Reset the TPDM. > > So, please remove the disable step here. I will update this in the next patch series. Best, Tao > > Suzuki > > >> + >> + return size; >> +} >> +static DEVICE_ATTR_WO(reset); >> + >> /* >> * value 1: 64 bits test data >> * value 2: 32 bits test data >> @@ -204,6 +230,7 @@ static ssize_t integration_test_store(struct >> device *dev, >> static DEVICE_ATTR_WO(integration_test); >> static struct attribute *tpdm_attrs[] = { >> + &dev_attr_reset.attr, >> &dev_attr_integration_test.attr, >> NULL, >> }; >
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm index 4a58e64..686bdde 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm @@ -11,3 +11,13 @@ Description: Accepts only one of the 2 values - 1 or 2. 1 : Generate 64 bits data 2 : Generate 32 bits data + +What: /sys/bus/coresight/devices/<tpdm-name>/reset +Date: March 2023 +KernelVersion 6.3 +Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Description: + (Write) Reset the dataset of the tpdm, and disable the tpdm. + + Accepts only one value - 1. + 1 : Reset the dataset of the tpdm diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c index 6f8a8ab..2e64cfd 100644 --- a/drivers/hwtracing/coresight/coresight-tpdm.c +++ b/drivers/hwtracing/coresight/coresight-tpdm.c @@ -164,6 +164,32 @@ static int tpdm_datasets_setup(struct tpdm_drvdata *drvdata) return 0; } +static ssize_t reset_store(struct device *dev, + struct device_attribute *attr, + const char *buf, + size_t size) +{ + int ret = 0; + unsigned long val; + struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 10, &val); + if (ret || val != 1) + return -EINVAL; + + spin_lock(&drvdata->spinlock); + tpdm_reset_datasets(drvdata); + + spin_unlock(&drvdata->spinlock); + + /* Disable tpdm if enabled */ + if (drvdata->enable) + coresight_disable_source(drvdata->csdev, NULL); + + return size; +} +static DEVICE_ATTR_WO(reset); + /* * value 1: 64 bits test data * value 2: 32 bits test data @@ -204,6 +230,7 @@ static ssize_t integration_test_store(struct device *dev, static DEVICE_ATTR_WO(integration_test); static struct attribute *tpdm_attrs[] = { + &dev_attr_reset.attr, &dev_attr_integration_test.attr, NULL, };