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From: Tao Zhang <quic_taozha@quicinc.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Konrad Dybcio <konradybcio@gmail.com>,
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CC: Tao Zhang <quic_taozha@quicinc.com>,
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Yuanfang Zhang <quic_yuanfang@quicinc.com>,
Trilok Soni <quic_tsoni@quicinc.com>,
Hao Zhang <quic_hazha@quicinc.com>,
<linux-arm-msm@vger.kernel.org>, <andersson@kernel.org>
Subject: [PATCH v4 10/11] dt-bindings: arm: Add support for DSB MSR register
Date: Thu, 27 Apr 2023 17:00:36 +0800
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| Series |
Add support to configure TPDM DSB subunit
|
|
Commit Message
Tao Zhang
April 27, 2023, 9 a.m. UTC
Add property "qcom,dsb-msrs-num" to support DSB(Discrete Single
Bit) MSR(mux select register) for TPDM. It specifies the number
of MSR registers supported by the DSB TDPM.
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
---
Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml index 932c55b..cbd746d 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml @@ -52,6 +52,15 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 enum: [32, 64] + qcom,dsb-msrs-num: + description: + Specifies the number of DSB(Discrete Single Bit) MSR(mux select register) + registers supported by the monitor. If this property is not configured + or set to 0, it means this DSB TPDM doesn't support MSR. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 32 + clocks: maxItems: 1