From patchwork Sat Apr 22 07:50:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tip-bot2 for Thomas Gleixner X-Patchwork-Id: 86564 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1582754vqo; Sat, 22 Apr 2023 01:41:26 -0700 (PDT) X-Google-Smtp-Source: AKy350btMKkqjoBbIsl47qPWZ17XTtYPcpiC5RddSY3S6wmX2JrO0xnZq5ATW85PovyicWrpg0TN X-Received: by 2002:a17:902:bd94:b0:1a6:ef75:3c53 with SMTP id q20-20020a170902bd9400b001a6ef753c53mr7015597pls.11.1682152886298; Sat, 22 Apr 2023 01:41:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682152886; cv=none; d=google.com; s=arc-20160816; b=xKI408CZQE7TcC4LyOUIyv0Eo9q5tSvQO1IxvPTToQOTlvzKJpouULb3KxHRsqkpLd Aw27wCJfg+TB9WPdtm8mxG5BOZDFpQAcOZmtBUaKkyJt5ZmN+QqbQkMUNDJQ2XzHDtz/ uz+dQIan65dsCN7po7AiQevoVbxpwXlDbMC3hXRs6xgQscWI6ebpfJUpFeDXaFfBguVX Zl+/5gXy4Dppskqf8IzAhoYoTQIQcNnmwdVAhfWuWhFBZe/fFBSt2ODT3EtX8lJIAB1O c2UatoBZRIUkpxDkdZX8bgRW37Xj1NqheX05k8mZlwDFiwIcsdDOc9w6dFhSemIpzJux 83yg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:robot-unsubscribe :robot-id:message-id:mime-version:references:in-reply-to:cc:subject :to:reply-to:sender:from:dkim-signature:dkim-signature:date; bh=kp72LK9WaclJ5pxZEmvQTdkDkgnKqBFZ36Ua+p4S1L4=; b=gvbPZWuvQcdqGV7TW02XuVRHHPeaRPuPXIGeXibzNzDq6pepbW0B8+/0Mw7+l581s1 q8j6ajzJpAPVIf3aVT2HWnGKfhQtn3GPJRRtxm8z2MF5Nm3gi0Rv/iA/LoRX/jIRMYzV y1UI9fJzHoyI6mMBVaMnL/fDvjJi4bOO6EhcdT2WN5GyrwNrwrnRNFVFAP6xACYlX1Xp UEmgLbkAY+BCDs3UxzlBRgTb85+BwCwFA52E6tzAa4sWWYPRIefw81D4JY5Vg5/M2h1K le0kGErBf4xk3QRcMM8x1NXJA2h90U4tMvO4SLiZEuAg4ci7o0lcheefUhrbMzTmHBLZ X+qQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=kbh0TBfY; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c7-20020a17090ad90700b002473c0c9fe9si9011546pjv.50.2023.04.22.01.41.14; Sat, 22 Apr 2023 01:41:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=kbh0TBfY; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229633AbjDVHur (ORCPT + 99 others); Sat, 22 Apr 2023 03:50:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229451AbjDVHup (ORCPT ); Sat, 22 Apr 2023 03:50:45 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0C9C11BDD; Sat, 22 Apr 2023 00:50:44 -0700 (PDT) Date: Sat, 22 Apr 2023 07:50:42 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1682149842; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=kp72LK9WaclJ5pxZEmvQTdkDkgnKqBFZ36Ua+p4S1L4=; b=kbh0TBfYYaPSjZtNZmsi0AjbPVypLTkkoIknelpgBOR0fusNkaE6UZg9ZacaiiPqVEpllc q/IHTRsPMEk6mjYEFez1SnfZcj9axqeUyl0CDuEIPRB4Ki79NqAULiiSL7t/8biKRo5uwQ b1yxKV81blMPQx1Tk3w40scVbJOKTANyrb8dze6WmvBHc8htDtEwTiO1zVUaLY8kA6mK4J 7oQklLrR9sph0QsbF9hDTVZm4gkpvZdnNiNWzkRGhaMboQfS5TKeAHl7x85toOu5akcbMD 4LvHtx0LRVJO9D+FcI8dGjS55OhGAyAhDT5RLad5iha8FFgghBBUYzKFl/qEWA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1682149842; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=kp72LK9WaclJ5pxZEmvQTdkDkgnKqBFZ36Ua+p4S1L4=; b=XJacbsippoNtco/F8fnx7kKWI05HXVglmzIO3utWeK9sMtPV7SfH1aWgEVIsd7/KEywZgk SBdL2dPyGqPNA+Cw== From: "tip-bot2 for Stephane Eranian" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: perf/core] perf/x86/intel/uncore: Add events for Intel SPR IMC PMU Cc: Stephane Eranian , "Peter Zijlstra (Intel)" , Kan Liang , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20230419214241.2310385-1-eranian@google.com> References: <20230419214241.2310385-1-eranian@google.com> MIME-Version: 1.0 Message-ID: <168214984206.404.825013264888504546.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763865144883883092?= X-GMAIL-MSGID: =?utf-8?q?1763865144883883092?= The following commit has been merged into the perf/core branch of tip: Commit-ID: 743767d6f6b8f28228be181fe369657f7ecd1eb2 Gitweb: https://git.kernel.org/tip/743767d6f6b8f28228be181fe369657f7ecd1eb2 Author: Stephane Eranian AuthorDate: Wed, 19 Apr 2023 14:42:41 -07:00 Committer: Peter Zijlstra CommitterDate: Fri, 21 Apr 2023 13:24:23 +02:00 perf/x86/intel/uncore: Add events for Intel SPR IMC PMU Add missing clockticks and cas_count_* events for Intel SapphireRapids IMC PMU. These events are useful to measure memory bandwidth. Signed-off-by: Stephane Eranian Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Kan Liang Link: https://lore.kernel.org/r/20230419214241.2310385-1-eranian@google.com --- arch/x86/events/intel/uncore_snbep.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c index 7d11995..fa9b209 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -6068,6 +6068,17 @@ static struct intel_uncore_ops spr_uncore_mmio_ops = { .read_counter = uncore_mmio_read_counter, }; +static struct uncore_event_desc spr_uncore_imc_events[] = { + INTEL_UNCORE_EVENT_DESC(clockticks, "event=0x01,umask=0x00"), + INTEL_UNCORE_EVENT_DESC(cas_count_read, "event=0x05,umask=0xcf"), + INTEL_UNCORE_EVENT_DESC(cas_count_read.scale, "6.103515625e-5"), + INTEL_UNCORE_EVENT_DESC(cas_count_read.unit, "MiB"), + INTEL_UNCORE_EVENT_DESC(cas_count_write, "event=0x05,umask=0xf0"), + INTEL_UNCORE_EVENT_DESC(cas_count_write.scale, "6.103515625e-5"), + INTEL_UNCORE_EVENT_DESC(cas_count_write.unit, "MiB"), + { /* end: all zeroes */ }, +}; + static struct intel_uncore_type spr_uncore_imc = { SPR_UNCORE_COMMON_FORMAT(), .name = "imc", @@ -6075,6 +6086,7 @@ static struct intel_uncore_type spr_uncore_imc = { .fixed_ctr = SNR_IMC_MMIO_PMON_FIXED_CTR, .fixed_ctl = SNR_IMC_MMIO_PMON_FIXED_CTL, .ops = &spr_uncore_mmio_ops, + .event_descs = spr_uncore_imc_events, }; static void spr_uncore_pci_enable_event(struct intel_uncore_box *box,