From patchwork Tue Apr 18 16:41:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tip-bot2 for Thomas Gleixner X-Patchwork-Id: 84957 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2988979vqo; Tue, 18 Apr 2023 09:44:29 -0700 (PDT) X-Google-Smtp-Source: AKy350YcO3w6GYBlkBoXQ1f54OVaH8abL+1u4yDHddW3onQ2YIgtUPZI3K7/JOKka/Ha1NxHf/Cr X-Received: by 2002:a05:6a21:9986:b0:f0:302a:ccd1 with SMTP id ve6-20020a056a21998600b000f0302accd1mr500763pzb.8.1681836269696; Tue, 18 Apr 2023 09:44:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1681836269; cv=none; d=google.com; s=arc-20160816; b=Hd/gKJTlZPSFgKz/sSr0EdarboXY3EDKnBYKBnsB6b5BFKsRFjPkKQS/NQHdic6Ay8 GNcq9klLy2tCEcMF6Ob030d7JX3911mJwVZZooeYn6vi0OYO9MDyP2NNx5DiETBb9kW8 1BwhcH+sCKhVq6Go2zmjoL0sn9N3smgUefqp6BeY/DmQuEKA4GzfMb/P01+EcKigLIEh /SDOJdt5/3COdpTl3Y1blRJ7gzU3ILAmR2S7nXD+9zDHzOKNDQ27qTgOv0T40s/xz+Vr 7ezMvBN9bMAPy7cYmojWRIfP7fi9ohHPoGKefU5iNjLyfGIMxPAwFi7WuBYlJnsuwp6s 05Kw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:robot-unsubscribe :robot-id:message-id:mime-version:references:in-reply-to:cc:subject :to:reply-to:sender:from:dkim-signature:dkim-signature:date; bh=6cRnvtpjH9+6TQbpL93sJPj7FNWyCzS76ma2aAuxOwU=; b=zQ6DnMtyhnIjQM22yFSECteFWs0vTyQRNeBO8OFMcrsiftRGvMj4Hz0uH/LUsgc+8J iyD05abB4SqlRHCKmHn6Nub4uLXBTuVrITOkDocwl50pzCptC2hrFjeSbshV3DftXlUm sobfLJtvipylSrFt66CnCtHASPLVsZPARjss2ncILtWxdRJpbfuIrGcG1MHkv914/czz QbOYEYP7W+oEJYE5bRdGmGhk7p1cz7WyDtQhgQ96D6+KEdeUXbstNw9Ko3/o4MOoAZmo fTE3Gn4+yh0pytQU2fETQ7BbYrUfTofI143ssGUrTPfX6cpCyjr5iSgM0HcdVCFBzmXI cMnw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=LgKgTH2P; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c2-20020a63d142000000b005194eaa611csi13554449pgj.397.2023.04.18.09.44.13; Tue, 18 Apr 2023 09:44:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=LgKgTH2P; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231635AbjDRQlT (ORCPT + 99 others); Tue, 18 Apr 2023 12:41:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52854 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229791AbjDRQlR (ORCPT ); Tue, 18 Apr 2023 12:41:17 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C4DA7173B for ; Tue, 18 Apr 2023 09:41:15 -0700 (PDT) Date: Tue, 18 Apr 2023 16:41:13 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1681836074; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6cRnvtpjH9+6TQbpL93sJPj7FNWyCzS76ma2aAuxOwU=; b=LgKgTH2Pju7qeAcv9GRbvTtGDymwoRBzmbvtRhEt0VQgyZcGaIigjg6VPaBv8G2xsTsdFd xjjmYiWO82gE2AIy3E52RaQtq90HgNMQUovewZHtloHykobnJQ/JwEB5uwleUtytf+UfR7 /65xi6OFN1zFjTJRIFC2xU1IOJnLWnLLCqR6U59s17bX8Rm3517FZHTodWxi8+KUxdd6c4 JkQLA6xhtO65YIQf/YoH1Q9dVLGQpHv5zL6NgW3wFQc6L1GmGinwjuzKKYkdtzdNzmfYN6 LkJ+7SlDf0/uDWpsR0SzvSjiJ+CpXCukv8VzVxXQDllEtwQZOu1orVdaieSevw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1681836074; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6cRnvtpjH9+6TQbpL93sJPj7FNWyCzS76ma2aAuxOwU=; b=hoHDU1CDO8wpoX/BekVTtpYksqkIf8If3R5tIY+zZo1HoS+7QgGT9nUB73cZJqdtT0Vosj 9Ud6jljFCCv2ZLCA== From: "irqchip-bot for Sebastian Reichel" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-kernel@vger.kernel.org Subject: [irqchip: irq/irqchip-next] irqchip/gic-v3: Add Rockchip 3588001 erratum workaround Cc: XiaoDong Huang , Kever Yang , Lucas Tanure , AngeloGioacchino Del Regno , Sebastian Reichel , Marc Zyngier , tglx@linutronix.de In-Reply-To: <20230418142109.49762-2-sebastian.reichel@collabora.com> References: <20230418142109.49762-2-sebastian.reichel@collabora.com> MIME-Version: 1.0 Message-ID: <168183607322.404.5670700847015937556.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763524926175550333?= X-GMAIL-MSGID: =?utf-8?q?1763533148601559762?= The following commit has been merged into the irq/irqchip-next branch of irqchip: Commit-ID: a8707f5538846611c90116c14f72539ad5fb37da Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/a8707f5538846611c90116c14f72539ad5fb37da Author: Sebastian Reichel AuthorDate: Tue, 18 Apr 2023 16:21:08 +02:00 Committer: Marc Zyngier CommitterDate: Tue, 18 Apr 2023 17:31:17 +01:00 irqchip/gic-v3: Add Rockchip 3588001 erratum workaround Rockchip RK3588/RK3588s GIC600 integration does not support the sharability feature. Rockchip assigned Erratum ID #3588001 for this issue. Note, that the 0x0201743b ID is not Rockchip specific and thus there is an extra of_machine_is_compatible() check. The flags are named FORCE_NON_SHAREABLE to be vendor agnostic, since apparently similar integration design errors exist in other platforms and they can reuse the same flag. Co-developed-by: XiaoDong Huang Signed-off-by: XiaoDong Huang Co-developed-by: Kever Yang Signed-off-by: Kever Yang Co-developed-by: Lucas Tanure Signed-off-by: Lucas Tanure Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Sebastian Reichel Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/20230418142109.49762-2-sebastian.reichel@collabora.com --- Documentation/arm64/silicon-errata.rst | 3 ++- arch/arm64/Kconfig | 10 +++++++- drivers/irqchip/irq-gic-v3-its.c | 35 +++++++++++++++++++++++++- 3 files changed, 48 insertions(+) diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst index e31f6c0..9e311bc 100644 --- a/Documentation/arm64/silicon-errata.rst +++ b/Documentation/arm64/silicon-errata.rst @@ -207,6 +207,9 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | Qualcomm Tech. | Kryo4xx Gold | N/A | ARM64_ERRATUM_1286807 | +----------------+-----------------+-----------------+-----------------------------+ ++----------------+-----------------+-----------------+-----------------------------+ +| Rockchip | RK3588 | #3588001 | ROCKCHIP_ERRATUM_3588001 | ++----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+ | Fujitsu | A64FX | E#010001 | FUJITSU_ERRATUM_010001 | diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 1023e89..0278921 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1150,6 +1150,16 @@ config NVIDIA_CARMEL_CNP_ERRATUM If unsure, say Y. +config ROCKCHIP_ERRATUM_3588001 + bool "Rockchip 3588001: GIC600 can not support shareability attributes" + default y + help + The Rockchip RK3588 GIC600 SoC integration does not support ACE/ACE-lite. + This means, that its sharability feature may not be used, even though it + is supported by the IP itself. + + If unsure, say Y. + config SOCIONEXT_SYNQUACER_PREITS bool "Socionext Synquacer: Workaround for GICv3 pre-ITS" default y diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 586271b..fa4641a 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -42,9 +42,11 @@ #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) +#define ITS_FLAGS_FORCE_NON_SHAREABLE (1ULL << 3) #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) +#define RDIST_FLAGS_FORCE_NON_SHAREABLE (1 << 2) #define RD_LOCAL_LPI_ENABLED BIT(0) #define RD_LOCAL_PENDTABLE_PREALLOCATED BIT(1) @@ -2359,6 +2361,9 @@ retry_baser: its_write_baser(its, baser, val); tmp = baser->val; + if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) + tmp &= ~GITS_BASER_SHAREABILITY_MASK; + if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { /* * Shareability didn't stick. Just use @@ -3096,6 +3101,9 @@ static void its_cpu_init_lpis(void) gicr_write_propbaser(val, rbase + GICR_PROPBASER); tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); + if (gic_rdists->flags & RDIST_FLAGS_FORCE_NON_SHAREABLE) + tmp &= ~GICR_PROPBASER_SHAREABILITY_MASK; + if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { /* @@ -3120,6 +3128,9 @@ static void its_cpu_init_lpis(void) gicr_write_pendbaser(val, rbase + GICR_PENDBASER); tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); + if (gic_rdists->flags & RDIST_FLAGS_FORCE_NON_SHAREABLE) + tmp &= ~GICR_PENDBASER_SHAREABILITY_MASK; + if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { /* * The HW reports non-shareable, we must remove the @@ -4710,6 +4721,19 @@ static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) return true; } +static bool __maybe_unused its_enable_rk3588001(void *data) +{ + struct its_node *its = data; + + if (!of_machine_is_compatible("rockchip,rk3588")) + return false; + + its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE; + gic_rdists->flags |= RDIST_FLAGS_FORCE_NON_SHAREABLE; + + return true; +} + static const struct gic_quirk its_quirks[] = { #ifdef CONFIG_CAVIUM_ERRATUM_22375 { @@ -4756,6 +4780,14 @@ static const struct gic_quirk its_quirks[] = { .init = its_enable_quirk_hip07_161600802, }, #endif +#ifdef CONFIG_ROCKCHIP_ERRATUM_3588001 + { + .desc = "ITS: Rockchip erratum RK3588001", + .iidr = 0x0201743b, + .mask = 0xffffffff, + .init = its_enable_rk3588001, + }, +#endif { } }; @@ -5096,6 +5128,9 @@ static int __init its_probe_one(struct resource *res, gits_write_cbaser(baser, its->base + GITS_CBASER); tmp = gits_read_cbaser(its->base + GITS_CBASER); + if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) + tmp &= ~GITS_CBASER_SHAREABILITY_MASK; + if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { /*