[irqchip:,irq/irqchip-next] irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode
Commit Message
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 0c60a31ce62ca3e93550868fd699dfc4dfc4e795
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/0c60a31ce62ca3e93550868fd699dfc4dfc4e795
Author: Anup Patel <apatel@ventanamicro.com>
AuthorDate: Tue, 28 Mar 2023 09:22:18 +05:30
Committer: Marc Zyngier <maz@kernel.org>
CommitterDate: Sat, 08 Apr 2023 11:26:24 +01:00
irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode
Various RISC-V drivers (such as SBI IPI, SBI Timer, SBI PMU, and
KVM RISC-V) don't have associated DT node but these drivers need
standard per-CPU (local) interrupts defined by the RISC-V privileged
specification.
We add riscv_get_intc_hwnode() in arch/riscv which allows RISC-V
drivers not having DT node to discover INTC hwnode which in-turn
helps these drivers to map per-CPU (local) interrupts provided
by the INTC driver.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230328035223.1480939-3-apatel@ventanamicro.com
---
arch/riscv/include/asm/irq.h | 4 ++++
arch/riscv/kernel/irq.c | 18 ++++++++++++++++++
drivers/irqchip/irq-riscv-intc.c | 7 +++++++
3 files changed, 29 insertions(+)
@@ -12,6 +12,10 @@
#include <asm-generic/irq.h>
+void riscv_set_intc_hwnode_fn(struct fwnode_handle *(*fn)(void));
+
+struct fwnode_handle *riscv_get_intc_hwnode(void);
+
extern void __init init_IRQ(void);
#endif /* _ASM_RISCV_IRQ_H */
@@ -7,9 +7,27 @@
#include <linux/interrupt.h>
#include <linux/irqchip.h>
+#include <linux/irqdomain.h>
+#include <linux/module.h>
#include <linux/seq_file.h>
#include <asm/smp.h>
+static struct fwnode_handle *(*__get_intc_node)(void);
+
+void riscv_set_intc_hwnode_fn(struct fwnode_handle *(*fn)(void))
+{
+ __get_intc_node = fn;
+}
+
+struct fwnode_handle *riscv_get_intc_hwnode(void)
+{
+ if (__get_intc_node)
+ return __get_intc_node();
+
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(riscv_get_intc_hwnode);
+
int arch_show_interrupts(struct seq_file *p, int prec)
{
show_ipi_stats(p, prec);
@@ -92,6 +92,11 @@ static const struct irq_domain_ops riscv_intc_domain_ops = {
.xlate = irq_domain_xlate_onecell,
};
+static struct fwnode_handle *riscv_intc_hwnode(void)
+{
+ return intc_domain->fwnode;
+}
+
static int __init riscv_intc_init(struct device_node *node,
struct device_node *parent)
{
@@ -126,6 +131,8 @@ static int __init riscv_intc_init(struct device_node *node,
return rc;
}
+ riscv_set_intc_hwnode_fn(riscv_intc_hwnode);
+
cpuhp_setup_state(CPUHP_AP_IRQ_RISCV_STARTING,
"irqchip/riscv/intc:starting",
riscv_intc_cpu_starting,