From patchwork Wed Feb 15 06:18:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 57389 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp39556wrn; Tue, 14 Feb 2023 22:54:57 -0800 (PST) X-Google-Smtp-Source: AK7set+98lEEIMm7PxNNyR3i0mceqHO1UVajOqebwjmf2TTSg/PQ6hzPBxebXbv7hiAHnTGwjNSN X-Received: by 2002:a17:906:d14d:b0:8ae:a761:e361 with SMTP id br13-20020a170906d14d00b008aea761e361mr1212889ejb.41.1676444097772; Tue, 14 Feb 2023 22:54:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444097; cv=none; d=google.com; s=arc-20160816; b=QCsLMqM7SdkeGLn/LMpsP07E/zJWOlgePZ5k6J7NuDfL6A/CMnnIY/Vy5xtRrx4vNI GC38FtZnK8CYqGH/nuQRoE/u1Gaa6Bvcd/UW5TYQw+v8kKqm5SJGANRkeY8KuGKFamxs qXcVec1gmEsLnyKEdJDzB76MQXEHPMfNSuI//ROmMLUxDfLxduFnf2FUJDB6/P8JRmez yt3LJTgcHQ2La3VxvMC93ujME91QzoWpRN1mQGmS6YfbAKbCSmXquDkHzT2JkS830C6W 1YKmun7SqJ5CHPbL/seTgsrsCgZUEGFgzl7E35u1lAJjX1ngF2KXHfp9J3mxpdBbptZg T5Mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=5UuBja/D+wBuzNHmiPUEhYYlvToz6fWqOfRU7TKgQbM=; b=h8KZ6u9pWEQO7z4DZDITFNlAWx3aZ/jd23mppMUTn0R+LkK/qic1p8K1uuxpfMHvuA z5Dn2SXiXizzAxYQMkErtGgTd8ejQzYZhH+ZLhhw74vrQ2UZUtfign+za3kPP57wRB5H Q87Vir/NgYLs29i4WxqPgBzDOVwhH04rLAS9qi6Y9LNpLZ72SKvycw4esoK4U7CkGRnA X4hxehNdO4YnbAAkCN5sfQkBCeiZJUIIpV/Pny6A4N/H2VZ2emrfTp6bqvaMcKY1Q7SW Qt7vww056oIJul45jmhlspW+LtDO3VyV/Hy98UpUi9zLYGD5b5zCtUMdAeId5G8bKvUJ +Xhw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c2-20020a1709063f0200b00886d6deb81fsi23853677ejj.1000.2023.02.14.22.54.34; Tue, 14 Feb 2023 22:54:57 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233513AbjBOGox (ORCPT + 99 others); Wed, 15 Feb 2023 01:44:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50570 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232815AbjBOGol (ORCPT ); Wed, 15 Feb 2023 01:44:41 -0500 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 944E73431A; Tue, 14 Feb 2023 22:44:40 -0800 (PST) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 4E962200191; Wed, 15 Feb 2023 07:44:39 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 180D4200631; Wed, 15 Feb 2023 07:44:39 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 27CFB1820F59; Wed, 15 Feb 2023 14:44:37 +0800 (+08) From: Richard Zhu To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, l.stach@pengutronix.de, shawnguo@kernel.org, lorenzo.pieralisi@arm.com, peng.fan@nxp.com, marex@denx.de, marcel.ziswiler@toradex.com, tharvey@gateworks.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v10 3/4] arm64: dts: Add i.MX8MQ PCIe EP support Date: Wed, 15 Feb 2023 14:18:34 +0800 Message-Id: <1676441915-1394-4-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1676441915-1394-1-git-send-email-hongxing.zhu@nxp.com> References: <1676441915-1394-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757879046531592687?= X-GMAIL-MSGID: =?utf-8?q?1757879046531592687?= Add i.MX8MQ PCIe EP support. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 32 +++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 98fbba4c99a9..9f950a6ac6c9 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -1605,6 +1605,38 @@ pcie1: pcie@33c00000 { status = "disabled"; }; + pcie1_ep: pcie-ep@33c00000 { + compatible = "fsl,imx8mq-pcie-ep"; + reg = <0x33c00000 0x000400000>, + <0x20000000 0x08000000>; + reg-names = "dbi", "addr_space"; + num-lanes = <1>; + interrupts = ; + interrupt-names = "dma"; + fsl,max-link-speed = <2>; + clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>, + <&clk IMX8MQ_CLK_PCIE2_PHY>, + <&clk IMX8MQ_CLK_PCIE2_PHY>, + <&clk IMX8MQ_CLK_PCIE2_AUX>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; + power-domains = <&pgc_pcie>; + resets = <&src IMX8MQ_RESET_PCIEPHY2>, + <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF>; + reset-names = "pciephy", "apps", "turnoff"; + assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_CTRL>, + <&clk IMX8MQ_CLK_PCIE2_PHY>, + <&clk IMX8MQ_CLK_PCIE2_AUX>; + assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_250M>, + <&clk IMX8MQ_SYS2_PLL_100M>, + <&clk IMX8MQ_SYS1_PLL_80M>; + assigned-clock-rates = <250000000>, <100000000>, + <10000000>; + num-ib-windows = <4>; + num-ob-windows = <4>; + status = "disabled"; + }; + gic: interrupt-controller@38800000 { compatible = "arm,gic-v3"; reg = <0x38800000 0x10000>, /* GIC Dist */