[RESEND,v5,1/6] dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property
Message ID | 1674322340-25882-2-git-send-email-quic_srivasam@quicinc.com |
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State | New |
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Series |
Add resets for ADSP based audio clock controller driver
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Commit Message
Srinivasa Rao Mandadapu
Jan. 21, 2023, 5:32 p.m. UTC
When this property is set, the remoteproc is used to boot the LPASS and therefore qdsp6ss clocks would be used to bring LPASS out of reset, hence they are directly controlled by the remoteproc. This is a cleanup done to handle overlap of regmap of lpasscc and adsp remoteproc blocks. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> --- Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml index 6151fde..97c6bd9 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml @@ -41,6 +41,12 @@ properties: - const: qdsp6ss - const: top_cc + qcom,adsp-pil-mode: + description: + Indicates if the LPASS would be brought out of reset using + remoteproc peripheral loader. + type: boolean + required: - compatible - reg @@ -60,6 +66,7 @@ examples: reg-names = "qdsp6ss", "top_cc"; clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; + qcom,adsp-pil-mode; #clock-cells = <1>; }; ...