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[2620:137:e000::1:20]) by mx.google.com with ESMTP id bm18-20020a656e92000000b004c1e81945d0si19879537pgb.557.2023.01.18.23.45.16; Wed, 18 Jan 2023 23:45:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=GoiIJNEy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230040AbjASHoG (ORCPT + 99 others); Thu, 19 Jan 2023 02:44:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230112AbjASHmu (ORCPT ); Thu, 19 Jan 2023 02:42:50 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBDFA6778B; Wed, 18 Jan 2023 23:42:43 -0800 (PST) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 30J5ui6b022741; Thu, 19 Jan 2023 07:42:30 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=nVFyQTH1bGyhE4TkcR/LX/K/m3EYN99ToRUyM9vQoxs=; b=GoiIJNEyywnW/U9ArdAW7g6Xu9iw0E98bML0PuVp9RCKZrT0ise+KzfuoiSQ3ofQxCYa 9uCCTEsUW4HCM+xCGWlmentnH8l/w8ab0dAJ/Nkkbry9iHvwGQErFilfZvU1+LSPvQV7 eCY4mDd8j/TgolxpIilHVoyMt2FkKPnty983qz/pWYU7CrnH35z1/LVorT8tgEvPohhu mFBCFXOfSXQTtTFoEmNXHnWrp+MljYZdERuCgEFTxMJJljTQeQ6HHT0h9+JBaWxw1Tw/ QbYCdtpcLRr5/uGyhGi7mPo2PpaYSACs3Bpspp1l1UGPt6b7M0C4o9nGYcG7v3se/wbR DQ== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3n6vjbgp7g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 19 Jan 2023 07:42:29 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 30J7gTpK023839 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 19 Jan 2023 07:42:29 GMT Received: from taozha-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 18 Jan 2023 23:42:24 -0800 From: Tao Zhang To: Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin , Konrad Dybcio , Mike Leach , Rob Herring , Krzysztof Kozlowski CC: Tao Zhang , Jinlong Mao , Leo Yan , Greg Kroah-Hartman , , , , , Tingwei Zhang , Yuanfang Zhang , Trilok Soni , Hao Zhang , , , Tao Zhang Subject: [PATCH v2 4/9] coresight-tpdm: Add reset node to TPDM node Date: Thu, 19 Jan 2023 15:41:40 +0800 Message-ID: <1674114105-16651-5-git-send-email-quic_taozha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1674114105-16651-1-git-send-email-quic_taozha@quicinc.com> References: <1674114105-16651-1-git-send-email-quic_taozha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: d4NLnGYK8McdYwo_GSDPpUAhpXKwKKBd X-Proofpoint-GUID: d4NLnGYK8McdYwo_GSDPpUAhpXKwKKBd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-18_05,2023-01-18_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 phishscore=0 malwarescore=0 mlxscore=0 spamscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301190062 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755436106344230015?= X-GMAIL-MSGID: =?utf-8?q?1755436106344230015?= TPDM device need a node to reset the configurations and status of it. So as to avoid the previous configurations affecting the current use, the configurations need to be reset first. And in some scenarios, it may be necessary to reset the TPDM configurations to complete the verification of certain function. This change provides a node to reset the configurations and disable the TPDM if it has been enabled. Signed-off-by: Tao Zhang Signed-off-by: Tao Zhang --- drivers/hwtracing/coresight/coresight-tpdm.c | 32 ++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c index 6befc87..c29d667d 100644 --- a/drivers/hwtracing/coresight/coresight-tpdm.c +++ b/drivers/hwtracing/coresight/coresight-tpdm.c @@ -161,6 +161,37 @@ static void tpdm_init_default_data(struct tpdm_drvdata *drvdata) } } +static ssize_t reset_store(struct device *dev, + struct device_attribute *attr, + const char *buf, + size_t size) +{ + int ret = 0; + unsigned long val; + struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 0, &val); + if (ret || (val != 1)) + return -EINVAL; + + spin_lock(&drvdata->spinlock); + /* Reset all datasets to ZERO */ + if (drvdata->dsb != NULL) + memset(drvdata->dsb, 0, sizeof(struct dsb_dataset)); + + /* Init the default data */ + tpdm_init_default_data(drvdata); + + spin_unlock(&drvdata->spinlock); + + /* Disable tpdm if enabled */ + if (drvdata->enable) + coresight_disable(drvdata->csdev); + + return size; +} +static DEVICE_ATTR_WO(reset); + /* * value 1: 64 bits test data * value 2: 32 bits test data @@ -201,6 +232,7 @@ static ssize_t integration_test_store(struct device *dev, static DEVICE_ATTR_WO(integration_test); static struct attribute *tpdm_attrs[] = { + &dev_attr_reset.attr, &dev_attr_integration_test.attr, NULL, };