Message ID | 1672407799-13768-2-git-send-email-quic_srivasam@quicinc.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2896921wrt; Fri, 30 Dec 2022 05:44:45 -0800 (PST) X-Google-Smtp-Source: AMrXdXtQRQ5cbK4P0dosvfYRTsI7Ax/gJNisReTTuM1YV4RVRRdBHKyhndgy149SUagrBe0Ci15b X-Received: by 2002:a17:906:d052:b0:7be:e26a:6104 with SMTP id bo18-20020a170906d05200b007bee26a6104mr27225199ejb.52.1672407885231; Fri, 30 Dec 2022 05:44:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672407885; cv=none; d=google.com; s=arc-20160816; b=VYn9p4XqlKGoQq6aXvLJIVbj10J2Nvpn7/GwuD7+3T6j6x2oJXqRwH6fz5TZJ/VEW+ AO3zcTq0FsF1h6UegNy3c1vzXWR6JmLGaeoHp9QKBCVKX0i0Ppq6+CsmgaFW+keASRuY n01nsuKpjRZoErqLzKYvDEWJtoyxNdqls+XayJUvaRnG2+Qpex/4aMf580SwJdHqfBdp r8QswMHZgwOI6CyssExRzLxcezSAaPsowcaaa+Xs7Ubd6+oy9deSl/1SkkytpxmlVKNK PaXFvJ7Z9utKcR+HQsOzJZyuhhitcyzOy9kfTaoxuur/K3p0/+u7lORRd7IgnO9Wk2H0 QIvQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=yRrnWsxN19SleGmb2WLV4xwmj/LedjaiXcqfX1bw8gg=; b=PzkmzSOiz7ZuMtU8tDbds/oC5S4u8wV53LTkmFV9YbvuqdxEl2/T+wsR2lOoBzSBgD ewJWpAzLM0jgwRlFANYP6BjmEN4orCyxcnY8a30DbD2B3361qOqxwBQX4g3ISLbrYMmM 5jLNiWVkECU0BQQcKYO7GBuy2wsZChWsEpz//3YkVe2Ea/RfGWj9p/0EOGFkuemfbwff ZZkY4xswfnTAM4t1ClOgVmX5JTW5ZNfFpQYQBX4TswyiszK9ae1EsPIa5hiOeU4N81Q/ 0H7c8PaJDy5m7Cm9KnLJMAitiaiNrCYLqsyIhkUGVhnSGsz/w17W6CuJoTEYagqjLe70 B8Ew== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=JPM3d+Im; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id nb14-20020a1709071c8e00b0082b4565362bsi17963509ejc.371.2022.12.30.05.44.21; Fri, 30 Dec 2022 05:44:45 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=JPM3d+Im; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235099AbiL3NoK (ORCPT <rfc822;cscallsign@gmail.com> + 99 others); Fri, 30 Dec 2022 08:44:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235055AbiL3NoE (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 30 Dec 2022 08:44:04 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A500B19006; Fri, 30 Dec 2022 05:44:03 -0800 (PST) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2BUDNtH3027692; Fri, 30 Dec 2022 13:43:52 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=yRrnWsxN19SleGmb2WLV4xwmj/LedjaiXcqfX1bw8gg=; b=JPM3d+ImcOD2Y4CZoe200C0LDjUZL4oT9Mvkpq2K9xVdVbk0irOilHiuJFlTjcadrKuG Gmp7sSZNzhmoAX+1gkfnB2EsUY9KkyNd/f2pXApu/NtRDhdeYpwI8T+GXwH3OqFYBpFz Wf6kKiOVI6X69UDcDXhbX6gXmwOMrz2P2C9hM68pDwzXTzH9iphBvUwB0mkJz4WVsIIT Lh9fjqL10F+MfmzJPXOJg61F/x/bFDHZS0SSiqzY8YlOW6TXD5376c+eyEfxLPNCw7Hy woExSrUVjyFCHONGnpoGPv6ZxkzfUDuSsbACehmweHD8XNOMTAdYRcYm7JrqE1vRTcBo xw== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3mrjugva5n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 30 Dec 2022 13:43:51 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2BUDhptq022477 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 30 Dec 2022 13:43:51 GMT Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 30 Dec 2022 05:43:46 -0800 From: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> To: <swboyd@chromium.org>, <agross@kernel.org>, <andersson@kernel.org>, <robh+dt@kernel.org>, <broonie@kernel.org>, <quic_plai@quicinc.com>, <krzysztof.kozlowski+dt@linaro.org>, <konrad.dybcio@somainline.org>, <mturquette@baylibre.com>, <sboyd@kernel.org>, <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <quic_rohkumar@quicinc.com> CC: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Subject: [PATCH v2 1/4] dt-bindings: clock: qcom,sc7280-lpasscc: Remove qdsp6ss reg property Date: Fri, 30 Dec 2022 19:13:16 +0530 Message-ID: <1672407799-13768-2-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1672407799-13768-1-git-send-email-quic_srivasam@quicinc.com> References: <1672407799-13768-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: f5JvgnsvCuUXl3Bb7X5uvwrkvFWhPLPO X-Proofpoint-GUID: f5JvgnsvCuUXl3Bb7X5uvwrkvFWhPLPO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-30_08,2022-12-30_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=999 malwarescore=0 adultscore=0 phishscore=0 priorityscore=1501 clxscore=1015 impostorscore=0 mlxscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2212300119 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753646770515266338?= X-GMAIL-MSGID: =?utf-8?q?1753646770515266338?= |
Series |
Add resets for ADSP based audio clock controller driver.
|
|
Commit Message
Srinivasa Rao Mandadapu
Dec. 30, 2022, 1:43 p.m. UTC
The qdsp6ss memory region is being shared by ADSP remoteproc device and lpasscc clock device, hence causing memory conflict. As the qdsp6ss clocks are being enabled in remoteproc driver, remove clock controlling in the clock driver. Fixes: d15eb8012476 ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280") Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> --- Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-)
Comments
On 30/12/2022 14:43, Srinivasa Rao Mandadapu wrote: > The qdsp6ss memory region is being shared by ADSP remoteproc device and > lpasscc clock device, hence causing memory conflict. > As the qdsp6ss clocks are being enabled in remoteproc driver, remove > clock controlling in the clock driver. > That's an ABI break change. You cannot just drop it because the driver will fail now to probe with old DTS. This ABI break (and Fixes tag below) requires extensive justification where is the bug and how it affects users. Otherwise, I see no reason for ABI changes. > Fixes: d15eb8012476 ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280") > Drop blank line. > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> > --- > Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml | 8 +++----- > 1 file changed, 3 insertions(+), 5 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml > index 6151fde..9c72b8e 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml > @@ -33,12 +33,10 @@ properties: > > reg: > items: > - - description: LPASS qdsp6ss register > - description: LPASS top-cc register > Best regards, Krzysztof
On 03/01/2023 06:51, Srinivasa Rao Mandadapu wrote: > > On 1/2/2023 9:33 PM, Krzysztof Kozlowski wrote: > Thanks for Your time Krzyszto!!! >> On 30/12/2022 14:43, Srinivasa Rao Mandadapu wrote: >>> The qdsp6ss memory region is being shared by ADSP remoteproc device and >>> lpasscc clock device, hence causing memory conflict. >>> As the qdsp6ss clocks are being enabled in remoteproc driver, remove >>> clock controlling in the clock driver. >>> >> That's an ABI break change. You cannot just drop it because the driver >> will fail now to probe with old DTS. >> >> This ABI break (and Fixes tag below) requires extensive justification >> where is the bug and how it affects users. Otherwise, I see no reason >> for ABI changes. > > As ADSP path is not used so far due to various vendor requirements, we > haven't seen this conflict till now. The device is used in sc7280.dtsi (and it is not disabled), thus it is available in every board. > > Actually, in the below commit, clock handling in remoteproc driver has > already up-streamed by Bjorn. > > If we add PIL device node and use remoteproc driver, qcom_q6v5_adsp.c, > it's mandatory to remove it from clock > > driver. > > Also the memory region is used by clock driver is part of > LPASS_QDSP6V67SS register region. > > Here is the commit 0c6de4c299cc8f3283c38f3778777e00ed7e4b69 > ("remoteproc: qcom: qdsp6-adsp: Add support for QCS404 CDSP") The commit introduces qcom,qcs404-cdsp-pil which is not used in upstream DTS... Anyway none of the reasons above explain to me why ABI has to be broken. To remind - valid reasons are usually only: "it never worked" or "I was introduced recently so there are no users". > For ABI Break resolution shall I include, device tree changes also in > this series? Or Could you please suggest better approach? Lack of DTS changes causes upstream to be broken. This is independent of ABI break. ABI means supporting users of the binding, so firmware, other OS, out-of-tree DTS users etc. All of them are broken. You need to keep backwards compatibility. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml index 6151fde..9c72b8e 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml @@ -33,12 +33,10 @@ properties: reg: items: - - description: LPASS qdsp6ss register - description: LPASS top-cc register reg-names: items: - - const: qdsp6ss - const: top_cc required: @@ -54,10 +52,10 @@ examples: - | #include <dt-bindings/clock/qcom,gcc-sc7280.h> #include <dt-bindings/clock/qcom,lpass-sc7280.h> - clock-controller@3000000 { + clock-controller@3c04000 { compatible = "qcom,sc7280-lpasscc"; - reg = <0x03000000 0x40>, <0x03c04000 0x4>; - reg-names = "qdsp6ss", "top_cc"; + reg = <0x03c04000 0x4>; + reg-names = "top_cc"; clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; #clock-cells = <1>;