diff mbox series

[V2] dmaengine: qcom: gpi: Set link_rx bit on GO TRE for rx operation

Message ID 1671212293-14767-1-git-send-email-quic_vnivarth@quicinc.com
State New
Headers
Series [V2] dmaengine: qcom: gpi: Set link_rx bit on GO TRE for rx operation |

Commit Message

Vijaya Krishna Nivarthi Dec. 16, 2022, 5:38 p.m. UTC 
  Rx operation on SPI GSI DMA is currently not working.
As per GSI spec, link_rx bit is to be set on GO TRE on tx
channel whenever there is going to be a DMA TRE on rx
channel. This is currently set for duplex operation only.

Set the bit for rx operation as well.
This is part of changes required to bring up Rx.

Fixes: 94b8f0e58fa1 ("dmaengine: qcom: gpi: set chain and link flag for duplex")
Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
---
v1 -> v2:
- updated change description
---
 drivers/dma/qcom/gpi.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Doug Anderson Dec. 16, 2022, 8:50 p.m. UTC | #1 
Hi,

On Fri, Dec 16, 2022 at 9:38 AM Vijaya Krishna Nivarthi
<quic_vnivarth@quicinc.com> wrote:
>
> Rx operation on SPI GSI DMA is currently not working.
> As per GSI spec, link_rx bit is to be set on GO TRE on tx
> channel whenever there is going to be a DMA TRE on rx
> channel. This is currently set for duplex operation only.
>
> Set the bit for rx operation as well.
> This is part of changes required to bring up Rx.
>
> Fixes: 94b8f0e58fa1 ("dmaengine: qcom: gpi: set chain and link flag for duplex")
> Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
> ---
> v1 -> v2:
> - updated change description
> ---
>  drivers/dma/qcom/gpi.c | 1 +
>  1 file changed, 1 insertion(+)

Without knowing anything about how the hardware actually works, I can
say that the change looks OK to me.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Vinod Koul Dec. 28, 2022, 6:56 a.m. UTC | #2 
On 16-12-22, 23:08, Vijaya Krishna Nivarthi wrote:
> Rx operation on SPI GSI DMA is currently not working.
> As per GSI spec, link_rx bit is to be set on GO TRE on tx
> channel whenever there is going to be a DMA TRE on rx
> channel. This is currently set for duplex operation only.
> 
> Set the bit for rx operation as well.
> This is part of changes required to bring up Rx.

Applied, thanks
diff mbox series

Patch

diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c
index 061add8..59a36cb 100644
--- a/drivers/dma/qcom/gpi.c
+++ b/drivers/dma/qcom/gpi.c
@@ -1756,6 +1756,7 @@  static int gpi_create_spi_tre(struct gchan *chan, struct gpi_desc *desc,
 		tre->dword[3] = u32_encode_bits(TRE_TYPE_GO, TRE_FLAGS_TYPE);
 		if (spi->cmd == SPI_RX) {
 			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_IEOB);
+			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_LINK);
 		} else if (spi->cmd == SPI_TX) {
 			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_CHAIN);
 		} else { /* SPI_DUPLEX */