[v2,2/3] ufs: core: mcq: Add Event Specific Interrupt enable and config APIs
Commit Message
Add two APIs to enable ESI and config ESI base addresses.
Signed-off-by: Can Guo <quic_cang@quicinc.com>
---
drivers/ufs/core/ufs-mcq.c | 16 ++++++++++++++++
include/ufs/ufshcd.h | 6 ++++++
include/ufs/ufshci.h | 2 ++
3 files changed, 24 insertions(+)
Comments
On 12/13/22 20:06, Can Guo wrote:
> Add two APIs to enable ESI and config ESI base addresses.
If this patch is reposted, please change "APIs" into "functions" and add
a sentence to explain that calls to the exported functions will be added
by the next patch in this series.
Thanks,
Bart.
Hi Bart,
On 12/15/2022 9:05 AM, Bart Van Assche wrote:
> On 12/13/22 20:06, Can Guo wrote:
>> Add two APIs to enable ESI and config ESI base addresses.
>
> If this patch is reposted, please change "APIs" into "functions" and
> add a sentence to explain that calls to the exported functions will be
> added by the next patch in this series.
>
> Thanks,
>
> Bart.
Thank you Bart for your review. I will upload a new version to adopt
your comments.
Best Regard,
Can Guo.
@@ -246,6 +246,7 @@ void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i)
{
writel(val, mcq_opr_base(hba, OPR_CQIS, i) + REG_CQIS);
}
+EXPORT_SYMBOL_GPL(ufshcd_mcq_write_cqis);
/*
* Current MCQ specification doesn't provide a Task Tag or its equivalent in
@@ -293,6 +294,7 @@ unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba,
return completed_reqs;
}
+EXPORT_SYMBOL_GPL(ufshcd_mcq_poll_cqe_nolock);
unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba,
struct ufs_hw_queue *hwq)
@@ -370,6 +372,20 @@ void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba)
}
}
+void ufshcd_mcq_enable_esi(struct ufs_hba *hba)
+{
+ ufshcd_writel(hba, ufshcd_readl(hba, REG_UFS_MEM_CFG) | 0x2,
+ REG_UFS_MEM_CFG);
+}
+EXPORT_SYMBOL_GPL(ufshcd_mcq_enable_esi);
+
+void ufshcd_mcq_config_esi(struct ufs_hba *hba, struct msi_msg *msg)
+{
+ ufshcd_writel(hba, msg->address_lo, REG_UFS_ESILBA);
+ ufshcd_writel(hba, msg->address_hi, REG_UFS_ESIUBA);
+}
+EXPORT_SYMBOL_GPL(ufshcd_mcq_config_esi);
+
int ufshcd_mcq_init(struct ufs_hba *hba)
{
struct Scsi_Host *host = hba->host;
@@ -16,6 +16,7 @@
#include <linux/blk-crypto-profile.h>
#include <linux/blk-mq.h>
#include <linux/devfreq.h>
+#include <linux/msi.h>
#include <linux/pm_runtime.h>
#include <scsi/scsi_device.h>
#include <ufs/unipro.h>
@@ -1201,6 +1202,11 @@ void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val);
void ufshcd_hba_stop(struct ufs_hba *hba);
void ufshcd_schedule_eh_work(struct ufs_hba *hba);
+void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i);
+unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba,
+ struct ufs_hw_queue *hwq);
+void ufshcd_mcq_enable_esi(struct ufs_hba *hba);
+void ufshcd_mcq_config_esi(struct ufs_hba *hba, struct msi_msg *msg);
/**
* ufshcd_set_variant - set variant specific data to the hba
@@ -59,6 +59,8 @@ enum {
REG_UFS_MEM_CFG = 0x300,
REG_UFS_MCQ_CFG = 0x380,
+ REG_UFS_ESILBA = 0x384,
+ REG_UFS_ESIUBA = 0x388,
UFSHCI_CRYPTO_REG_SPACE_SIZE = 0x400,
};