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[irqchip:,irq/irqchip-next] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller

Message ID 166946968615.4906.13490870742447683383.tip-bot2@tip-bot2
State New
Headers
Series [irqchip:,irq/irqchip-next] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller |

Commit Message

tip-bot2 for Thomas Gleixner Nov. 26, 2022, 1:34 p.m. UTC 
  The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     6b2748ada244c7597e9b677a0bdda4e8781a8d8f
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/6b2748ada244c7597e9b677a0bdda4e8781a8d8f
Author:        Liu Peibao <liupeibao@loongson.cn>
AuthorDate:    Mon, 14 Nov 2022 19:38:24 +08:00
Committer:     Marc Zyngier <maz@kernel.org>
CommitterDate: Sat, 26 Nov 2022 11:54:11 

dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller

Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how
the 14 IRQs are wired to the platform's internal interrupt controller by
devicetree.

Signed-off-by: Liu Peibao <liupeibao@loongson.cn>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221114113824.1880-3-liupeibao@loongson.cn
---
 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
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Patch

diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
new file mode 100644
index 0000000..2a1cf88
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
@@ -0,0 +1,34 @@ 
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LoongArch CPU Interrupt Controller
+
+maintainers:
+  - Liu Peibao <liupeibao@loongson.cn>
+
+properties:
+  compatible:
+    const: loongarch,cpu-interrupt-controller
+
+  '#interrupt-cells':
+    const: 1
+
+  interrupt-controller: true
+
+additionalProperties: false
+
+required:
+  - compatible
+  - '#interrupt-cells'
+  - interrupt-controller
+
+examples:
+  - |
+    interrupt-controller {
+      compatible = "loongarch,cpu-interrupt-controller";
+      #interrupt-cells = <1>;
+      interrupt-controller;
+    };