[tip:,x86/cpu] x86/cpufeatures: Add X86_FEATURE_XENPV to disabled-features.h
Commit Message
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 15e15d64bd8e12d835f6bb1b1ce3ffa13fa03a66
Gitweb: https://git.kernel.org/tip/15e15d64bd8e12d835f6bb1b1ce3ffa13fa03a66
Author: Juergen Gross <jgross@suse.com>
AuthorDate: Fri, 04 Nov 2022 08:26:57 +01:00
Committer: Borislav Petkov <bp@suse.de>
CommitterDate: Tue, 22 Nov 2022 15:42:33 +01:00
x86/cpufeatures: Add X86_FEATURE_XENPV to disabled-features.h
Add X86_FEATURE_XENPV to the features handled specially in
disabled-features.h.
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: https://lore.kernel.org/r/20221104072701.20283-2-jgross@suse.com
---
arch/x86/include/asm/disabled-features.h | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
@@ -81,6 +81,12 @@
# define DISABLE_SGX (1 << (X86_FEATURE_SGX & 31))
#endif
+#ifdef CONFIG_XEN_PV
+# define DISABLE_XENPV 0
+#else
+# define DISABLE_XENPV (1 << (X86_FEATURE_XENPV & 31))
+#endif
+
#ifdef CONFIG_INTEL_TDX_GUEST
# define DISABLE_TDX_GUEST 0
#else
@@ -98,7 +104,7 @@
#define DISABLED_MASK5 0
#define DISABLED_MASK6 0
#define DISABLED_MASK7 (DISABLE_PTI)
-#define DISABLED_MASK8 (DISABLE_TDX_GUEST)
+#define DISABLED_MASK8 (DISABLE_XENPV|DISABLE_TDX_GUEST)
#define DISABLED_MASK9 (DISABLE_SGX)
#define DISABLED_MASK10 0
#define DISABLED_MASK11 (DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET)