From patchwork Thu Nov 17 15:07:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tip-bot2 for Thomas Gleixner X-Patchwork-Id: 21712 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp452675wrr; Thu, 17 Nov 2022 07:10:56 -0800 (PST) X-Google-Smtp-Source: AA0mqf4AQte76IRc4r6NY22V0ca+hlhXNKA0DnC3j6WT3oL2vX/io6BDDIfongjH8tEkagaRFljY X-Received: by 2002:a17:906:6c86:b0:78d:4ba6:f65a with SMTP id s6-20020a1709066c8600b0078d4ba6f65amr2589179ejr.186.1668697856107; Thu, 17 Nov 2022 07:10:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668697856; cv=none; d=google.com; s=arc-20160816; b=QGLxuN61TXl7rAjEOG8Vnq+sriTXOESYRvAsOntofb3Sveyvj/qWpWSD36C1PxWg8m ms278xZGoX9n4vOA1JuF5YLD35u5q2WxM6jSYNfGkrVF15P1zXS50MFFahQlrETKcBwI pDEl0wAe0eqJY08lrLXiBQ5jyT0DY+3A81ZIpdzg6O3Ps7jnLsG9vNIICFyfRqlh/oVg vhx/TWCaEQHtdZEH8eo0pbKeOhHVU12Wdjarm10wTLn/dIEuocf/8yDMX6yv2NXl6uuT XqJvsOJJaeLKNPgs6/pq1Q0hKVreNr4BgJ1bIYCuOMWh9yTLybhkgoQqtA0jTiOW/uvq Ehzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:robot-unsubscribe :robot-id:message-id:mime-version:references:in-reply-to:cc:subject :to:reply-to:sender:from:dkim-signature:dkim-signature:date; bh=VNmQEcEjGzxFCaQveibqJYQwGgBrqlyIcsFyeRFOUc4=; b=v2I6jXICnt1vfzZ8vHp5+bGwu7TWt6MVZHRP2S8LsoDcA6ytFNe7Hslv2tcsxojLLu 7J75sTqOoO3sMfvRbsziKUi1MIjOTdaOZZZR9h1SRKTZQKdIrA/kzqR0pEkN+rqFmJkg MaENxRM9XUc+hy+pkkC70HSpIBc+RLbgTxgQGfhmJhwczL+pPrSnJlyVGdJmWGw+bxGD KtqeNXyUMgfeXMOl6DiabKfU33q/iDy04SFnePQEFqPAS3rdoWRr9nVylOdi8e//oquS Uupp+r3ocIRUqng4Fv0ZPHRy946Qe35XYjJabeR57F7qg2q2jBcR9eCIs7KYLC0NV0I9 D2fQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=uv04DabO; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z16-20020a05640240d000b004607378ae65si1209764edb.160.2022.11.17.07.10.25; Thu, 17 Nov 2022 07:10:56 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=uv04DabO; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239903AbiKQPH4 (ORCPT + 99 others); Thu, 17 Nov 2022 10:07:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53490 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234965AbiKQPHz (ORCPT ); Thu, 17 Nov 2022 10:07:55 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5F9F140A6; Thu, 17 Nov 2022 07:07:53 -0800 (PST) Date: Thu, 17 Nov 2022 15:07:50 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668697672; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VNmQEcEjGzxFCaQveibqJYQwGgBrqlyIcsFyeRFOUc4=; b=uv04DabORtBeXcnJJ3ROYUdj9aSgLMClMv0lkN/cCSV5LyiZ0cSJZzJ8rXrEz8dPr/w3kh n7GTuaje6khIpSf58sqLGlICRfyuAXgT5Bz391TYgBXlJVLo1xyYb69bA8VDrkIbmvByNz ULl32Dg6S2kxDFNZDFU8VOd19uB1Vk5rzJYJGG4r/K5rchhhgD1kQh6sTp//Zv51YzPd46 Vl+m43ScXdqztv/dnR5CvYnK7Tc1rYfZn63t9asY54nsJrQFzcgLws5csvcwWKxvnCKT4J Yp2SwTaHkNcnYjgL9faYoE4qTb4I85WifTht9iIvSZtvOkx91L5hWb5BgG8ayg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668697672; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VNmQEcEjGzxFCaQveibqJYQwGgBrqlyIcsFyeRFOUc4=; b=JPSFDf0yt6efXnHjchIlkmkc26QQ5XWT/iokX5v4QnVzuc+T8LTxlFZrdfDC3AXDpSwfWC cofgYlQj/pHr/0BQ== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/core] x86/apic: Remove X86_IRQ_ALLOC_CONTIGUOUS_VECTORS Cc: Thomas Gleixner , Jason Gunthorpe , x86@kernel.org, linux-kernel@vger.kernel.org, maz@kernel.org In-Reply-To: <20221111122015.865042356@linutronix.de> References: <20221111122015.865042356@linutronix.de> MIME-Version: 1.0 Message-ID: <166869767063.4906.3559414491432257536.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208460381136396?= X-GMAIL-MSGID: =?utf-8?q?1749756523351507910?= The following commit has been merged into the irq/core branch of tip: Commit-ID: d474d92d70250d43e7ce0c7cb8623f31ee7c40f6 Gitweb: https://git.kernel.org/tip/d474d92d70250d43e7ce0c7cb8623f31ee7c40f6 Author: Thomas Gleixner AuthorDate: Fri, 11 Nov 2022 14:55:17 +01:00 Committer: Thomas Gleixner CommitterDate: Thu, 17 Nov 2022 15:15:22 +01:00 x86/apic: Remove X86_IRQ_ALLOC_CONTIGUOUS_VECTORS Now that the PCI/MSI core code does early checking for multi-MSI support X86_IRQ_ALLOC_CONTIGUOUS_VECTORS is not required anymore. Remove the flag and rely on MSI_FLAG_MULTI_PCI_MSI. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe Link: https://lore.kernel.org/r/20221111122015.865042356@linutronix.de --- arch/x86/include/asm/irqdomain.h | 4 +--- arch/x86/kernel/apic/msi.c | 6 ++---- arch/x86/kernel/apic/vector.c | 4 ---- drivers/iommu/amd/iommu.c | 7 ------- drivers/iommu/intel/irq_remapping.c | 7 ------- drivers/pci/controller/pci-hyperv.c | 15 +-------------- 6 files changed, 4 insertions(+), 39 deletions(-) diff --git a/arch/x86/include/asm/irqdomain.h b/arch/x86/include/asm/irqdomain.h index 125c23b..30c325c 100644 --- a/arch/x86/include/asm/irqdomain.h +++ b/arch/x86/include/asm/irqdomain.h @@ -7,9 +7,7 @@ #ifdef CONFIG_X86_LOCAL_APIC enum { - /* Allocate contiguous CPU vectors */ - X86_IRQ_ALLOC_CONTIGUOUS_VECTORS = 0x1, - X86_IRQ_ALLOC_LEGACY = 0x2, + X86_IRQ_ALLOC_LEGACY = 0x1, }; extern int x86_fwspec_is_ioapic(struct irq_fwspec *fwspec); diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c index 7517eb0..248a6a5 100644 --- a/arch/x86/kernel/apic/msi.c +++ b/arch/x86/kernel/apic/msi.c @@ -161,12 +161,10 @@ int pci_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec, msi_alloc_info_t *arg) { init_irq_alloc_info(arg, NULL); - if (to_pci_dev(dev)->msix_enabled) { + if (to_pci_dev(dev)->msix_enabled) arg->type = X86_IRQ_ALLOC_TYPE_PCI_MSIX; - } else { + else arg->type = X86_IRQ_ALLOC_TYPE_PCI_MSI; - arg->flags |= X86_IRQ_ALLOC_CONTIGUOUS_VECTORS; - } return 0; } diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c index 3e6f6b4..c1efebd 100644 --- a/arch/x86/kernel/apic/vector.c +++ b/arch/x86/kernel/apic/vector.c @@ -539,10 +539,6 @@ static int x86_vector_alloc_irqs(struct irq_domain *domain, unsigned int virq, if (disable_apic) return -ENXIO; - /* Currently vector allocator can't guarantee contiguous allocations */ - if ((info->flags & X86_IRQ_ALLOC_CONTIGUOUS_VECTORS) && nr_irqs > 1) - return -ENOSYS; - /* * Catch any attempt to touch the cascade interrupt on a PIC * equipped system. diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 8ece864..72dfe57 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -3297,13 +3297,6 @@ static int irq_remapping_alloc(struct irq_domain *domain, unsigned int virq, if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI) return -EINVAL; - /* - * With IRQ remapping enabled, don't need contiguous CPU vectors - * to support multiple MSI interrupts. - */ - if (info->type == X86_IRQ_ALLOC_TYPE_PCI_MSI) - info->flags &= ~X86_IRQ_ALLOC_CONTIGUOUS_VECTORS; - sbdf = get_devid(info); if (sbdf < 0) return -EINVAL; diff --git a/drivers/iommu/intel/irq_remapping.c b/drivers/iommu/intel/irq_remapping.c index 0b80a27..a914eba 100644 --- a/drivers/iommu/intel/irq_remapping.c +++ b/drivers/iommu/intel/irq_remapping.c @@ -1337,13 +1337,6 @@ static int intel_irq_remapping_alloc(struct irq_domain *domain, if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI) return -EINVAL; - /* - * With IRQ remapping enabled, don't need contiguous CPU vectors - * to support multiple MSI interrupts. - */ - if (info->type == X86_IRQ_ALLOC_TYPE_PCI_MSI) - info->flags &= ~X86_IRQ_ALLOC_CONTIGUOUS_VECTORS; - ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg); if (ret < 0) return ret; diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c index ba64284..1dee55d 100644 --- a/drivers/pci/controller/pci-hyperv.c +++ b/drivers/pci/controller/pci-hyperv.c @@ -611,20 +611,7 @@ static unsigned int hv_msi_get_int_vector(struct irq_data *data) return cfg->vector; } -static int hv_msi_prepare(struct irq_domain *domain, struct device *dev, - int nvec, msi_alloc_info_t *info) -{ - int ret = pci_msi_prepare(domain, dev, nvec, info); - - /* - * By using the interrupt remapper in the hypervisor IOMMU, contiguous - * CPU vectors is not needed for multi-MSI - */ - if (info->type == X86_IRQ_ALLOC_TYPE_PCI_MSI) - info->flags &= ~X86_IRQ_ALLOC_CONTIGUOUS_VECTORS; - - return ret; -} +#define hv_msi_prepare pci_msi_prepare /** * hv_arch_irq_unmask() - "Unmask" the IRQ by setting its current