From patchwork Mon Oct 24 08:06:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 8235 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp320117wru; Mon, 24 Oct 2022 01:29:10 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7ssN3lQR/78aB6wyJljxm1hPftt2xfWZPX0Q/Zovlwf6cftDlpwZupnSjkjzFF/C0K38Ot X-Received: by 2002:a17:902:d510:b0:185:4b76:6277 with SMTP id b16-20020a170902d51000b001854b766277mr31946786plg.82.1666600150299; Mon, 24 Oct 2022 01:29:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666600150; cv=none; d=google.com; s=arc-20160816; b=Qvu3oZwfW8nfUZLIkRFpNi3DGDr2cgVJurL7BMtUQ/jpxXT31HLJDjZmcxQb25Tunq 0GuVSqXrfWC2laEEfSeb/YQcmngrYK3AcCCBjscVInXEi5l0vRalrSroVc3hAJCjmd2n sFPrVU4T82pkGtEdt7yOCuUZuppAXtsTHoI3NY7I5PliCPl0sFLKqTBhrhpInvTivP1M rqyU1dXtmP+Mg6T0Ez5AnBgAyFyFeUUrL7xDLQrJ10KXu2/MiOQsU2DUtZwB8YFK6Gs4 2h3V9P8CqilZdTxhju1my/drv1JzbAqkC+RLNoKDzb/SyCxdijb5L+LZLEYgvT0FtQ3S A3bA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=5crGIsUUxjW1PB0EwBMl4gKAXwZ/2/PFNNC9GMegpyc=; b=e8Im4oikoi4IFFU72p1twHKVrbH6pqL6BUeGHfDsRU82gUQ8YQmKLHWpXLK/twYxrs Iqkf5gxvSO6dxmKGpQ5+Wbz+bdVdnpVxti1MXwE3r570C2+ZoFOZSRQ8MC3TMQotylFw HSiu869RD7GbHOD+5UG/F2YvhMowZzBgdsQgFL0BfzzqICmLe6/A57BWobUsCiewKEV+ nH1bS5/UfwK5gATq6sWZNIHncJ2ajkWvS1TrKNNxjfJZQc9GOgRrsp69lq78rJ2secQ1 GebiCBoCgj+eG8KUI5TVfvjnzNsnpjJu6+z0eOiR8dKNI0XESVqO3lxY3EjUkH/cynAX rh8w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h64-20020a638343000000b00460c07c5542si3056641pge.407.2022.10.24.01.28.57; Mon, 24 Oct 2022 01:29:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230512AbiJXI2l (ORCPT + 99 others); Mon, 24 Oct 2022 04:28:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55896 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230403AbiJXI2C (ORCPT ); Mon, 24 Oct 2022 04:28:02 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A0B154E632; Mon, 24 Oct 2022 01:27:50 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id D52C21B8F26; Mon, 24 Oct 2022 10:27:13 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 9D99A1B8F3A; Mon, 24 Oct 2022 10:27:13 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id DBDA71820F58; Mon, 24 Oct 2022 16:27:11 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 06/14] arm64: dts: Add i.MX8MQ PCIe EP support Date: Mon, 24 Oct 2022 16:06:35 +0800 Message-Id: <1666598803-1912-7-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747556919381564045?= X-GMAIL-MSGID: =?utf-8?q?1747556919381564045?= Add i.MX8MQ PCIe EP support. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 27 +++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 19eaa523564d..93871804b282 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -1581,6 +1581,33 @@ pcie1: pcie@33c00000 { status = "disabled"; }; + pcie1_ep: pcie_ep@33c00000 { + compatible = "fsl,imx8mq-pcie-ep"; + reg = <0x33c00000 0x000400000>, + <0x20000000 0x08000000>; + reg-names = "regs", "addr_space"; + num-lanes = <1>; + interrupts = ; + interrupt-names = "dma"; + fsl,max-link-speed = <2>; + power-domains = <&pgc_pcie>; + resets = <&src IMX8MQ_RESET_PCIEPHY2>, + <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF>; + reset-names = "pciephy", "apps", "turnoff"; + assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_CTRL>, + <&clk IMX8MQ_CLK_PCIE2_PHY>, + <&clk IMX8MQ_CLK_PCIE2_AUX>; + assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_250M>, + <&clk IMX8MQ_SYS2_PLL_100M>, + <&clk IMX8MQ_SYS1_PLL_80M>; + assigned-clock-rates = <250000000>, <100000000>, + <10000000>; + num-ib-windows = <4>; + num-ob-windows = <4>; + status = "disabled"; + }; + gic: interrupt-controller@38800000 { compatible = "arm,gic-v3"; reg = <0x38800000 0x10000>, /* GIC Dist */