[2/2] drm: mediatek: Add mt8188 dpi compatibles and platform data
Commit Message
From: xinlei lee <xinlei.lee@mediatek.com>
For MT8188, the vdosys0 only supports 1T1P mode, so we need to add the compatible for mt8188 edp-intf.
Signed-off-by: xinlei lee <xinlei.lee@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++++++
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
2 files changed, 19 insertions(+)
Comments
Il 20/10/22 09:05, xinlei.lee@mediatek.com ha scritto:
> From: xinlei lee <xinlei.lee@mediatek.com>
>
> For MT8188, the vdosys0 only supports 1T1P mode, so we need to add the compatible for mt8188 edp-intf.
>
> Signed-off-by: xinlei lee <xinlei.lee@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++++++
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
> 2 files changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index 508a6d9..5cefda4 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -929,6 +929,20 @@ static const struct mtk_dpi_conf mt8183_conf = {
> .csc_enable_bit = CSC_ENABLE,
> };
>
> +static const struct mtk_dpi_conf mt8188_edpintf_conf = {
> + .cal_factor = mt8195_dpintf_calculate_factor,
> + .max_clock_khz = 600000,
> + .output_fmts = mt8195_output_fmts,
> + .num_output_fmts = ARRAY_SIZE(mt8195_output_fmts),
> + .pixels_per_iter = 4,
> + .input_2pixel = false,
> + .dimension_mask = DPINTF_HPW_MASK,
> + .hvsize_mask = DPINTF_HSIZE_MASK,
> + .channel_swap_shift = DPINTF_CH_SWAP,
> + .yuv422_en_bit = DPINTF_YUV422_EN,
> + .csc_enable_bit = DPINTF_CSC_ENABLE,
> +};
> +
> static const struct mtk_dpi_conf mt8192_conf = {
> .cal_factor = mt8183_calculate_factor,
> .reg_h_fre_con = 0xe0,
> @@ -1079,6 +1093,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = {
> { .compatible = "mediatek,mt8183-dpi",
> .data = &mt8183_conf,
> },
> + { .compatible = "mediatek,mt8188-edp-intf",
> + .data = &mt8188_edpintf_conf,
Please rename to:
mediatek,mt8188-dp-intf
and
&mt8188_dpintf_conf
> + },
> { .compatible = "mediatek,mt8192-dpi",
> .data = &mt8192_conf,
> },
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> index 91f58db..5732ed8 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> @@ -631,6 +631,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
> .data = (void *)MTK_DPI },
> { .compatible = "mediatek,mt8183-dpi",
> .data = (void *)MTK_DPI },
> + { .compatible = "mediatek,mt8188-edp-intf",
Same here.
Regards,
Angelo
@@ -929,6 +929,20 @@ static const struct mtk_dpi_conf mt8183_conf = {
.csc_enable_bit = CSC_ENABLE,
};
+static const struct mtk_dpi_conf mt8188_edpintf_conf = {
+ .cal_factor = mt8195_dpintf_calculate_factor,
+ .max_clock_khz = 600000,
+ .output_fmts = mt8195_output_fmts,
+ .num_output_fmts = ARRAY_SIZE(mt8195_output_fmts),
+ .pixels_per_iter = 4,
+ .input_2pixel = false,
+ .dimension_mask = DPINTF_HPW_MASK,
+ .hvsize_mask = DPINTF_HSIZE_MASK,
+ .channel_swap_shift = DPINTF_CH_SWAP,
+ .yuv422_en_bit = DPINTF_YUV422_EN,
+ .csc_enable_bit = DPINTF_CSC_ENABLE,
+};
+
static const struct mtk_dpi_conf mt8192_conf = {
.cal_factor = mt8183_calculate_factor,
.reg_h_fre_con = 0xe0,
@@ -1079,6 +1093,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = {
{ .compatible = "mediatek,mt8183-dpi",
.data = &mt8183_conf,
},
+ { .compatible = "mediatek,mt8188-edp-intf",
+ .data = &mt8188_edpintf_conf,
+ },
{ .compatible = "mediatek,mt8192-dpi",
.data = &mt8192_conf,
},
@@ -631,6 +631,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
.data = (void *)MTK_DPI },
{ .compatible = "mediatek,mt8183-dpi",
.data = (void *)MTK_DPI },
+ { .compatible = "mediatek,mt8188-edp-intf",
+ .data = (void *)MTK_DP_INTF },
{ .compatible = "mediatek,mt8192-dpi",
.data = (void *)MTK_DPI },
{ .compatible = "mediatek,mt8195-dp-intf",