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[2620:137:e000::1:20]) by mx.google.com with ESMTP id hp6-20020a1709073e0600b0078068832a70si14202736ejc.446.2022.10.18.02.31.42; Tue, 18 Oct 2022 02:32:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=jj3zOxKi; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=iROsh7Zw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229916AbiJRJ0s (ORCPT + 99 others); Tue, 18 Oct 2022 05:26:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37150 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229943AbiJRJ0c (ORCPT ); Tue, 18 Oct 2022 05:26:32 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 749C8AE848; Tue, 18 Oct 2022 02:26:20 -0700 (PDT) Date: Tue, 18 Oct 2022 09:26:15 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1666085177; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=k1t2QP68OmE6u2uzMGPoB8a7JOZ2kIqcFRyJqlQqc6A=; b=jj3zOxKigIdkl2IAmy9jJF1vl1x266TiYq5fuLJonxzG0p7ESzH7issoXhbtk8NrdQKLJj h4t5GEX6a63Dnwrn8LUItSme2k6SWWMvGczSFX+07ogardio19cJG54qmvphl8pgCiEMFX 2Iks4dkUDNuLBvue7Sf8ZLA60sd88UcTpLXmGIhrze7I7Ku9Wzh1pheoAsR5WBeztF7stn B1/oqaiNYYtCP+eKcYTNwQptRl7B53pF9EPkDyFeZ4jarWBHWIYikHC8scBBzrb4hOaNci gfKQxn07NA8graJHDFETfxRBSHuqdWEwlsaKQvW/5F/sTiM0cQI7gxG/ldHJCg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1666085177; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=k1t2QP68OmE6u2uzMGPoB8a7JOZ2kIqcFRyJqlQqc6A=; b=iROsh7ZwVQwCQDQeJ5cTvUee+3mqOin302YkbQ489/mj5xLqqfX32DPRo87t+PicTW/QGk M2fgoScgqfpWA0Dg== From: "tip-bot2 for Borislav Petkov" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/urgent] x86/microcode/AMD: Apply the patch early on every logical thread Cc: stefantalpalaru@yahoo.com, Borislav Petkov , , x86@kernel.org, linux-kernel@vger.kernel.org MIME-Version: 1.0 Message-ID: <166608517523.401.12312055863747452497.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747017297549784324?= X-GMAIL-MSGID: =?utf-8?q?1747017297549784324?= The following commit has been merged into the x86/urgent branch of tip: Commit-ID: e7ad18d1169c62e6c78c01ff693fd362d9d65278 Gitweb: https://git.kernel.org/tip/e7ad18d1169c62e6c78c01ff693fd362d9d65278 Author: Borislav Petkov AuthorDate: Wed, 05 Oct 2022 12:00:08 +02:00 Committer: Borislav Petkov CommitterDate: Tue, 18 Oct 2022 11:03:27 +02:00 x86/microcode/AMD: Apply the patch early on every logical thread Currently, the patch application logic checks whether the revision needs to be applied on each logical CPU (SMT thread). Therefore, on SMT designs where the microcode engine is shared between the two threads, the application happens only on one of them as that is enough to update the shared microcode engine. However, there are microcode patches which do per-thread modification, see Link tag below. Therefore, drop the revision check and try applying on each thread. This is what the BIOS does too so this method is very much tested. Btw, change only the early paths. On the late loading paths, there's no point in doing per-thread modification because if is it some case like in the bugzilla below - removing a CPUID flag - the kernel cannot go and un-use features it has detected are there early. For that, one should use early loading anyway. [ bp: Fixes does not contain the oldest commit which did check for equality but that is good enough. ] Fixes: 8801b3fcb574 ("x86/microcode/AMD: Rework container parsing") Reported-by: Ștefan Talpalaru Signed-off-by: Borislav Petkov Tested-by: Ștefan Talpalaru Cc: Link: https://bugzilla.kernel.org/show_bug.cgi?id=216211 --- arch/x86/kernel/cpu/microcode/amd.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c index e7410e9..3a35dec 100644 --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c @@ -440,7 +440,13 @@ apply_microcode_early_amd(u32 cpuid_1_eax, void *ucode, size_t size, bool save_p return ret; native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); - if (rev >= mc->hdr.patch_id) + + /* + * Allow application of the same revision to pick up SMT-specific + * changes even if the revision of the other SMT thread is already + * up-to-date. + */ + if (rev > mc->hdr.patch_id) return ret; if (!__apply_microcode_amd(mc)) { @@ -528,8 +534,12 @@ void load_ucode_amd_ap(unsigned int cpuid_1_eax) native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); - /* Check whether we have saved a new patch already: */ - if (*new_rev && rev < mc->hdr.patch_id) { + /* + * Check whether a new patch has been saved already. Also, allow application of + * the same revision in order to pick up SMT-thread-specific configuration even + * if the sibling SMT thread already has an up-to-date revision. + */ + if (*new_rev && rev <= mc->hdr.patch_id) { if (!__apply_microcode_amd(mc)) { *new_rev = mc->hdr.patch_id; return;