Message ID | 0a10afeff3aec3a8bccca2dbe4e65f7b4a2c4666.1708381247.git.efectn@protonmail.com |
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Series |
[1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2
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Commit Message
Muhammed Efe Cetin
Feb. 19, 2024, 10:34 p.m. UTC
From: Muhammed Efe Cetin <efectn@protonmail.com> Khadas Edge 2 has onboard AP6275P Wi-Fi6 (PCIe2) and BT5 (UART9) module. This commit enables UART9. Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com> --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index c2a329f151a1..767e21b2dc34 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -244,6 +244,20 @@ ir_receiver_pin: ir-receiver-pin { rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + wireless-bluetooth { + bt_reset_pin: bt-reset-pin { + rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_pin: bt-wake-pin { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + bt_wake_host_irq: bt-wake-host-irq { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; }; &pcie2x1l2 { @@ -647,6 +661,12 @@ &uart2 { status = "okay"; }; +&uart9 { + pinctrl-names = "default"; + pinctrl-0 = <&uart9m2_xfer &uart9m2_ctsn>; + status = "okay"; +}; + &u2phy2 { status = "okay"; };