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drm/msm/dpu: correctly implement SSPP & WB Clock Control Split
| 5 patches
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[v3,5/5] drm/msm/dpu: enable writeback on SM8550
drm/msm/dpu: correctly implement SSPP & WB Clock Control Split
- 1 -
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2023-10-12
Neil Armstrong
New
[v3,4/5] drm/msm/dpu: sm8550: remove unused VIG and DMA clock controls entries
drm/msm/dpu: correctly implement SSPP & WB Clock Control Split
- 1 -
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2023-10-12
Neil Armstrong
New
[v3,3/5] drm/msm/dpu: move setup_force_clk_ctrl handling into plane and wb
drm/msm/dpu: correctly implement SSPP & WB Clock Control Split
- 1 -
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2023-10-12
Neil Armstrong
New
[v3,2/5] drm/msm/dpu: add setup_clk_force_ctrl() op to sspp & wb
drm/msm/dpu: correctly implement SSPP & WB Clock Control Split
- 1 -
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-
-
2023-10-12
Neil Armstrong
New
[v3,1/5] drm/msm/dpu: create a dpu_hw_clk_force_ctrl() helper
drm/msm/dpu: correctly implement SSPP & WB Clock Control Split
- 1 -
-
-
-
2023-10-12
Neil Armstrong
New