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Thanks, Chen --- Changes in v7: The patch series is based on v6.7. You can simply review or test the patches at the link [8]. - fixed initval issue. - fixed pll clk crash issue. - fixed warning reported by - code optimization as per review comments. - code cleanup and style improvements as per review comments and checkpatch with "--strict" Changes in v6: The patch series is based on v6.7-rc1. You can simply review or test the patches at the link [7]. - fixed some warnings/errors reported by kernel test robot . Changes in v5: The patch series is based on v6.7-rc1. You can simply review or test the patches at the link [6]. - dt-bindings: improved yaml, such as: - add vendor prefix for system-ctrl property for clock generator. - Add explanation for system-ctrl property. - move sophgo,sg2042-clkgen.yaml to directly under clock folder. - fixed bugs for driver Makefile/Kconfig - continue cleaning-up debug print for driver code. Changes in v4: The patch series is based on v6.7-rc1. You can simply review or test the patches at the link [5]. - dt-bindings: fixed a dt_binding_check error. Changes in v3: The patch series is based on v6.7-rc1. You can simply review or test the patches at the link [3]. - DTS: don't use syscon but define sg2042 specific system control node. More background info can read [4]. - Updating minor issues in dt-bindings as per input from reviews. Changes in v2: The patch series is based on v6.7-rc1. You can simply review or test the patches at the link [2]. - Squashed the patch adding clock definitions with the patch adding the binding for the clock controller. - Updating dt-binding for syscon, remove oneOf for property compatible; define clock controller as child of syscon. - DTS changes: merge sg2042-clock.dtsi into sg2042.dtsi; move clock-frequency property of osc to board devicethree due to the oscillator is outside the SoC. - Fixed some bugs in driver code during testing, including removing warnings for rv32_defconfig. - Updated MAINTAINERS info. Changes in v1: The patch series is based on v6.7-rc1. You can simply review or test the patches at the link [1]. Link: https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v1 [1] Link: https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v2 [2] Link: https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v3 [3] Link: https://lore.kernel.org/linux-riscv/MA0P287MB03329AE180378E1A2E034374FE82A@MA0P287MB0332.INDP287.PROD.OUTLOOK.COM/ [4] Link: https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v4 [5] Link: https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v5 [6] Link: https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v6 [7] Link: https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v7 [8] --- Chen Wang (4): dt-bindings: soc: sophgo: Add Sophgo system control module dt-bindings: clock: sophgo: support SG2042 clk: sophgo: Add SG2042 clock generator driver riscv: dts: add clock generator for Sophgo SG2042 SoC .../bindings/clock/sophgo,sg2042-clkgen.yaml | 53 + .../soc/sophgo/sophgo,sg2042-sysctrl.yaml | 34 + MAINTAINERS | 7 + .../boot/dts/sophgo/sg2042-milkv-pioneer.dts | 4 + arch/riscv/boot/dts/sophgo/sg2042.dtsi | 23 + drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/sophgo/Kconfig | 8 + drivers/clk/sophgo/Makefile | 2 + drivers/clk/sophgo/clk-sophgo-sg2042.c | 1316 +++++++++++++++++ drivers/clk/sophgo/clk-sophgo-sg2042.h | 236 +++ .../dt-bindings/clock/sophgo,sg2042-clkgen.h | 169 +++ 12 files changed, 1854 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/sophgo,sg2042-clkgen.yaml create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-sysctrl.yaml create mode 100644 drivers/clk/sophgo/Kconfig create mode 100644 drivers/clk/sophgo/Makefile create mode 100644 drivers/clk/sophgo/clk-sophgo-sg2042.c create mode 100644 drivers/clk/sophgo/clk-sophgo-sg2042.h create mode 100644 include/dt-bindings/clock/sophgo,sg2042-clkgen.h base-commit: 0dd3ee31125508cd67f7e7172247f05b7fd1753a