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Sun, 26 Nov 2023 16:57:47 -0800 (PST) From: Chen Wang <unicornxw@gmail.com> To: aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, palmer@dabbelt.com, paul.walmsley@sifive.com, richardcochran@gmail.com, robh+dt@kernel.org, sboyd@kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, haijiao.liu@sophgo.com, xiaoguang.xing@sophgo.com, guoren@kernel.org, jszhang@kernel.org, inochiama@outlook.com, samuel.holland@sifive.com Cc: Chen Wang <unicorn_wang@outlook.com> Subject: [PATCH v2 0/4] riscv: sophgo: add clock support for sg2042 Date: Mon, 27 Nov 2023 08:57:38 +0800 Message-Id: <cover.1701044106.git.unicorn_wang@outlook.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); 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Series | riscv: sophgo: add clock support for sg2042 | |
Message
Chen Wang
Nov. 27, 2023, 12:57 a.m. UTC
From: Chen Wang <unicorn_wang@outlook.com>
This series adds clock controller support for sophgo sg2042.
Thanks,
Chen
---
Changes in v2:
The patch series is based on v6.7-rc1. You can simply review or test the
patches at the link [2].
- Squashed the patch adding clock definitions with the patch adding the
binding for the clock controller.
- Updating dt-binding for syscon, remove oneOf for property compatible;
define clock controller as child of syscon.
- DTS changes: merge sg2042-clock.dtsi into sg2042.dtsi; move clock-frequency
property of osc to board devicethree due to the oscillator is outside the
SoC.
- Fixed some bugs in driver code during testing, including removing warnings
for rv32_defconfig.
- Updated MAINTAINERS info.
Changes in v1:
The patch series is based on v6.7-rc1. You can simply review or test the
patches at the link [1].
Link: https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v1 [1]
Link: https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v2 [2]
---
Chen Wang (4):
dt-bindings: clock: sophgo: Add SG2042 bindings
dt-bindings: soc: sophgo: Add Sophgo syscon module
clk: sophgo: Add SG2042 clock generator driver
riscv: dts: add clock generator for Sophgo SG2042 SoC
.../clock/sophgo/sophgo,sg2042-clkgen.yaml | 42 +
.../soc/sophgo/sophgo,sg2042-syscon.yaml | 58 +
MAINTAINERS | 7 +
.../boot/dts/sophgo/sg2042-milkv-pioneer.dts | 4 +
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 77 +
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/sophgo/Kconfig | 8 +
drivers/clk/sophgo/Makefile | 2 +
drivers/clk/sophgo/clk-sophgo-sg2042.c | 1357 +++++++++++++++++
drivers/clk/sophgo/clk-sophgo-sg2042.h | 222 +++
include/dt-bindings/clock/sophgo-sg2042-clk.h | 169 ++
12 files changed, 1948 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/sophgo/sophgo,sg2042-clkgen.yaml
create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml
create mode 100644 drivers/clk/sophgo/Kconfig
create mode 100644 drivers/clk/sophgo/Makefile
create mode 100644 drivers/clk/sophgo/clk-sophgo-sg2042.c
create mode 100644 drivers/clk/sophgo/clk-sophgo-sg2042.h
create mode 100644 include/dt-bindings/clock/sophgo-sg2042-clk.h
base-commit: b85ea95d086471afb4ad062012a4d73cd328fa86