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Sat, 18 Nov 2023 07:06:44 +0000 Received: from IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::55b:c350:980:ad8]) by IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::55b:c350:980:ad8%6]) with mapi id 15.20.7002.025; Sat, 18 Nov 2023 07:06:44 +0000 From: Inochi Amaoto To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chao Wei , Chen Wang , Paul Walmsley , Palmer Dabbelt , Albert Ou , Inochi Amaoto , Xiaoguang Xing , Guo Ren Cc: Anup Patel , Samuel Holland , Jisheng Zhang , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v4 0/2] Change the sg2042 timer layout to fit aclint format Date: Sat, 18 Nov 2023 15:06:36 +0800 Message-ID: X-Mailer: git-send-email 2.42.1 X-TMN: [Dz05Plhc5Z5eVXOB+AzIVt/VNzFMjl7zZlC2aPIOXww=] X-ClientProxiedBy: SI2PR06CA0011.apcprd06.prod.outlook.com (2603:1096:4:186::16) To IA1PR20MB4953.namprd20.prod.outlook.com (2603:10b6:208:3af::19) X-Microsoft-Original-Message-ID: <20231118070639.244948-1-inochiama@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR20MB4953:EE_|DS0PR20MB5788:EE_ X-MS-Office365-Filtering-Correlation-Id: 020369a9-a1f9-4be9-5591-08dbe804ebe7 X-Microsoft-Antispam: BCL:0; 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Fri, 17 Nov 2023 23:07:00 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782884583963696055 X-GMAIL-MSGID: 1782884583963696055 As the sg2042 uses different address for timer and mswi of its clint device, it should follow the aclint format. For the previous patchs, it only use only one address for both mtime and mtimer, this is can not be parsed by OpenSBI. To resolve this, separate these two registers in the dtb. Link: https://lists.infradead.org/pipermail/opensbi/2023-October/005693.html Link: https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc This patch can be tested with upstream SBI with the following patch: 1. https://lists.infradead.org/pipermail/opensbi/2023-November/005926.html Changed from v3: 1. add all register in the bindings Changed from v2: 1. Use reg-names to map the registers. Changed from v1: 1. change the commit to address the reason for ABI change. 2. remove unnecessary link in the commit. Inochi Amaoto (2): dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format .../timer/thead,c900-aclint-mtimer.yaml | 42 +++++++++- arch/riscv/boot/dts/sophgo/sg2042.dtsi | 80 +++++++++++-------- 2 files changed, 89 insertions(+), 33 deletions(-) --- 2.42.1