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Tue, 27 Feb 2024 06:04:30 -0800 Received: from IPBU-BLR-SERVER1.marvell.com (IPBU-BLR-SERVER1.marvell.com [10.28.8.41]) by maili.marvell.com (Postfix) with ESMTP id EF4CC3F712E; Tue, 27 Feb 2024 06:04:27 -0800 (PST) From: Gowthami Thiagarajan To: , , , CC: , , , Gowthami Thiagarajan Subject: [PATCH v4 0/3] Marvell Odyssey uncore performance monitor support Date: Tue, 27 Feb 2024 19:34:22 +0530 Message-ID: <20240227140425.3418814-1-gthiagarajan@marvell.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-GUID: hXX9Xp2x5RJu1LtnKdCWpNZvF_UwbOv_ X-Proofpoint-ORIG-GUID: hXX9Xp2x5RJu1LtnKdCWpNZvF_UwbOv_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-26_11,2024-02-27_01,2023-05-22_02 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792061156622043888 X-GMAIL-MSGID: 1792061156622043888 Odyssey is a 64 bit ARM based SoC with multiple performance monitor units for various blocks. This series of patches introduces support for uncore performance monitor units (PMUs) on the Marvell Odyssey platform. The PMUs covered in this series include the DDR PMU and LLC-TAD PMU. v3->v4: - Refactored the existing ddr pmu driver to extract the platform data Gowthami Thiagarajan (3): perf/marvell: Refactor to extract platform data - no functional change perf/marvell: perf/marvell: Odyssey DDR Performance monitor support perf/marvell : Odyssey LLC-TAD performance monitor support drivers/perf/marvell_cn10k_ddr_pmu.c | 528 +++++++++++++++++++++++---- drivers/perf/marvell_cn10k_tad_pmu.c | 62 +++- 2 files changed, 515 insertions(+), 75 deletions(-)