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Mon, 26 Feb 2024 16:36:32 -0800 (PST) Received: from sw06.internal.sifive.com ([4.53.31.132]) by smtp.gmail.com with ESMTPSA id z25-20020a631919000000b005dc85821c80sm4504117pgl.12.2024.02.26.16.36.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Feb 2024 16:36:31 -0800 (PST) From: Samuel Holland To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Samuel Holland Subject: [PATCH 0/4] riscv: 64-bit NOMMU fixes and enhancements Date: Mon, 26 Feb 2024 16:34:45 -0800 Message-ID: <20240227003630.3634533-1-samuel.holland@sifive.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792010322807256871 X-GMAIL-MSGID: 1792010322807256871 This series aims to improve support for NOMMU, specifically by making it easier to test NOMMU kernels in QEMU and on various widely-available hardware (errata permitting). After all, everything supports Svbare... After applying this series, a NOMMU kernel based on defconfig (changing only the three options below*) boots to userspace on QEMU when passed as -kernel. # CONFIG_RISCV_M_MODE is not set # CONFIG_MMU is not set CONFIG_NONPORTABLE=y *if you are using LLD, you must also disable BPF_SYSCALL and KALLSYMS, because LLD bails on out-of-range references to undefined weak symbols. Samuel Holland (4): riscv: Fix TASK_SIZE on 64-bit NOMMU riscv: Fix loading 64-bit NOMMU kernels past the start of RAM riscv: Remove MMU dependency from Zbb and Zicboz riscv: Allow NOMMU kernels to run in S-mode arch/riscv/Kconfig | 17 ++++++++++------- arch/riscv/include/asm/page.h | 2 +- arch/riscv/include/asm/pgtable.h | 2 +- arch/riscv/mm/init.c | 2 +- 4 files changed, 13 insertions(+), 10 deletions(-)