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Mon, 19 Feb 2024 15:05:24 +0100 (CET) Received: from localhost (10.201.21.177) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 19 Feb 2024 15:05:24 +0100 From: Christophe Kerello To: , , , , , CC: , , , , Christophe Kerello Subject: [PATCH v2 0/3] mtd: rawnand: stm32_fmc2: add MP25 support Date: Mon, 19 Feb 2024 15:05:02 +0100 Message-ID: <20240219140505.85794-1-christophe.kerello@foss.st.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-19_10,2024-02-19_01,2023-05-22_02 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791336562229026413 X-GMAIL-MSGID: 1791337004691382689 FMC2 IP supports up to 4 chip select. On MP1 SoC, only 2 of them are available when on MP25 SoC, the 4 chip select are available. For MP1 SoCs, MDMA is used and the max burst size is 128. For MP25 SoC, DMA3 is used and the max burst size is 64. Changes in v2: - dt-bindings commit message has been updated. - V1 patch 10, 11 and 12 have been squashed and reworked. Christophe Kerello (3): dt-bindings: mtd: st,stm32: add MP25 support mtd: rawnand: stm32_fmc2: use dma_get_slave_caps to get DMA max burst mtd: rawnand: stm32_fmc2: add MP25 support .../bindings/mtd/st,stm32-fmc2-nand.yaml | 25 +++++- drivers/mtd/nand/raw/stm32_fmc2_nand.c | 83 +++++++++++++++---- 2 files changed, 93 insertions(+), 15 deletions(-)