Message ID | 20240219-topic-rb1_gpu-v2-0-2d3d6a0db040@linaro.org |
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[78.88.45.141]) by smtp.gmail.com with ESMTPSA id mj8-20020a170906af8800b00a3ee9305b02sm4091226ejb.20.2024.02.23.13.21.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Feb 2024 13:21:45 -0800 (PST) From: Konrad Dybcio <konrad.dybcio@linaro.org> Subject: [PATCH v2 0/7] A702 support Date: Fri, 23 Feb 2024 22:21:36 +0100 Message-Id: <20240219-topic-rb1_gpu-v2-0-2d3d6a0db040@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAGAM2WUC/3WNQQqDMBBFryKzbkoSraaueo8iJcZRBySRiUqLe Pem7rt8D/5/O0Rkwgh1tgPjRpGCT6AvGbjR+gEFdYlBS11Ire5iCTM5wa16DfMqcnTGlSaXuSk gbVobUbRsvRvTyq/TlOTM2NP7jDybxCPFJfDnbG7qZ//db0pI0elS9tbcikpWj4m85XANPEBzH McX0NVltcAAAAA= To: Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>, Joerg Roedel <joro@8bytes.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Clark <robdclark@gmail.com>, Abhinav Kumar <quic_abhinavk@quicinc.com>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch> Cc: Marijn Suijten <marijn.suijten@somainline.org>, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio <konradybcio@kernel.org>, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Konrad Dybcio <konrad.dybcio@linaro.org> X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708723303; l=2367; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=7tHpBwYBjs0QIZxWGt5a/fib2c1/MZ4A6oZE+Z30PYs=; b=epuG5oAKrr533fJKmkaFnj1FjTAPxNoYkEMcHz+KHP4gzlrOn5lsXpP9f1YjnwX0/IsJ6cXt4 ZTN2yx5xm87CgDWY+vMjlaY6zIT3LRax1dgd2sxLnp0EOV4B4xdjC4F X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791726273785523913 X-GMAIL-MSGID: 1791726273785523913 |
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A702 support
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Message
Konrad Dybcio
Feb. 23, 2024, 9:21 p.m. UTC
Bit of a megaseries, bunched together for your testing convenience..
Needs mesa!27665 [1] on the userland part, kmscube happily spins.
I'm feeling quite lukewarm about the memory barriers in patch 3..
Patch 1 for Will/smmu, 5-6 for drm/msm, rest for qcom
[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27665
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
Changes in v2:
- Drop applied smmu-bindings patch
- Fix the gpucc bindings patch to be even better
- Reorder HUAYRA_2290 definitions near HUAYRA (..Add HUAYRA_2290
support..)
- Replace weird memory barriers copypasted from msm-5.4 with readback to
ensure timely write completion (..Add HUAYRA_2290 support..)
- Keep my super amazing commit message referencing the 3D accelerator
official naming (dts)
- Pick up tags
- Link to v1: https://lore.kernel.org/r/20240219-topic-rb1_gpu-v1-0-d260fa854707@linaro.org
---
Konrad Dybcio (7):
dt-bindings: clock: Add Qcom QCM2290 GPUCC
clk: qcom: clk-alpha-pll: Add HUAYRA_2290 support
clk: qcom: Add QCM2290 GPU clock controller driver
drm/msm/adreno: Add missing defines for A702
drm/msm/adreno: Add A702 support
arm64: dts: qcom: qcm2290: Add GPU nodes
arm64: dts: qcom: qrb2210-rb1: Enable the GPU
.../bindings/clock/qcom,qcm2290-gpucc.yaml | 77 ++++
arch/arm64/boot/dts/qcom/qcm2290.dtsi | 154 ++++++++
arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 8 +
drivers/clk/qcom/Kconfig | 9 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clk-alpha-pll.c | 47 +++
drivers/clk/qcom/clk-alpha-pll.h | 3 +
drivers/clk/qcom/gpucc-qcm2290.c | 423 +++++++++++++++++++++
drivers/gpu/drm/msm/adreno/a6xx.xml.h | 18 +
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 92 ++++-
drivers/gpu/drm/msm/adreno/adreno_device.c | 18 +
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 16 +-
include/dt-bindings/clock/qcom,qcm2290-gpucc.h | 32 ++
13 files changed, 889 insertions(+), 9 deletions(-)
---
base-commit: 26d7d52b6253574d5b6fec16a93e1110d1489cef
change-id: 20240219-topic-rb1_gpu-3ec8c6830384
Best regards,
Comments
On Fri, Feb 23, 2024 at 10:21:36PM +0100, Konrad Dybcio wrote: > Bit of a megaseries, bunched together for your testing convenience.. > Needs mesa!27665 [1] on the userland part, kmscube happily spins. > > I'm feeling quite lukewarm about the memory barriers in patch 3.. > > Patch 1 for Will/smmu, 5-6 for drm/msm, rest for qcom I'm guessing you don't really expect me to take the clock bindings?! Will
On 2/27/24 11:10, Will Deacon wrote: > On Fri, Feb 23, 2024 at 10:21:36PM +0100, Konrad Dybcio wrote: >> Bit of a megaseries, bunched together for your testing convenience.. >> Needs mesa!27665 [1] on the userland part, kmscube happily spins. >> >> I'm feeling quite lukewarm about the memory barriers in patch 3.. >> >> Patch 1 for Will/smmu, 5-6 for drm/msm, rest for qcom > > I'm guessing you don't really expect me to take the clock bindings?! Sorry, I didn't remove this hunk from v1 (where it was smmu changes that you already took)! Konrad