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[2a01:c22:7b37:4900::e63]) by smtp.googlemail.com with ESMTPSA id r16-20020a1709067fd000b00a3e88f99cf1sm412710ejs.149.2024.02.18.09.41.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Feb 2024 09:41:55 -0800 (PST) From: Martin Blumenstingl To: daniel.lezcano@linaro.org, tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, andrea.merello@gmail.com, patrice.chotard@foss.st.com, linux-amlogic@lists.infradead.org, Martin Blumenstingl Subject: [PATCH v1 0/2] clocksource/drivers/arm_global_timer: Two small fixes Date: Sun, 18 Feb 2024 18:41:36 +0100 Message-ID: <20240218174138.1942418-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.43.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791259462083001777 X-GMAIL-MSGID: 1791259462083001777 This series consists of two small fixes: 1) incorrect max width (and therefore mask calculation) of the prescaler field in the Global Timer Control Register. The field is actually 8 bit wide according to the Cortex-A9 MPCore Technical Reference Manual r3p0 [0] 2) non-function: a stray tab which is inconsistent with to the coding style in the driver I don't have any ARM/STI hardware to verify the first fix. However, I tested this on an Amlogic Meson8b board with Cortex-A5 which uses the same Global Timer implementation as Cortex-A9 SoCs and the documentation confirms the same register layout: [1] [0] https://developer.arm.com/documentation/ddi0407/g/Global-timer--private-timers--and-watchdog-registers/Global-timer-registers/Global-Timer-Control-Register [1] https://developer.arm.com/documentation/ddi0434/b/CIHJGFEA Martin Blumenstingl (2): clocksource/drivers/arm_global_timer: Fix maximum prescaler value clocksource/drivers/arm_global_timer: Remove stray tab drivers/clocksource/arm_global_timer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)