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b=H4sIAK+cz2UC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyjHQUlJIzE vPSU3UzU4B8JSMDIxMDI0Mz3ZRy3YyU3ERdM5OUlGQDy7QkY4MkJaDqgqLUtMwKsEnRsbW1AMI 0aL5ZAAAA To: Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Marek Vasut , Yoshihiro Shimoda , Kishon Vijay Abraham I Cc: Serge Semin , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org, mhi@lists.linux.dev, Manivannan Sadhasivam , Mrinmay Sarkar X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2441; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=99VEk3JCJiDH24Jv72sqb98zC6yFP+9ws46GoTojhW0=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBlz5y8/nDWN+q7bOqSTwmMApHd0RdZi4kG0v2Us R/zkzK7KXyJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZc+cvAAKCRBVnxHm/pHO 9f2MB/wKutNeeQWuBJWdggFALHVJZ/xi34jw93TUq4RTBXX2RsNOIFMplUKyw9Z4v/FfFlq4vZF 5a7A1WU1IKubiwSRWWtWPsxqLW8VgdIMQlwQzO+HVM4UsyCvQD7BEYlVU6usyZTB3AFV7ShBN1I uoCZmc3kii12NlYwGWOBXk8+FmX2WfhCUZEPB7mOIiLwuU0jHvUZYGcArZTsj14DRdbPOWdbht7 8e54cmerwAeAMb9cKV39Ewhp3gEK4LpD6Mol7yeyTlk+LK3aUmWHqSZgvU8TbIfG59cWsE6dRvm aJTxCV11jqoAB2jOuuNGsnpVkASMoUg1RVAGjhlEr8DLcG50 X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791077821709350370 X-GMAIL-MSGID: 1791077821709350370 Hello, This series adds support for integrating HDMA with the DWC EP driver. Hyper DMA (HDMA) is already supported by the dw-edma dmaengine driver. Unlike it's predecessor Embedded DMA (eDMA), HDMA supports only unroll mapping format and doesn't support auto detecting the read/write channels. Hence, this series modifies the existing eDMA code to work with HDMA by honoring the platform supplied mapping format and read/write channels count. The platform drivers making use of HDMA should pass the EDMA_MF_HDMA_NATIVE flag and provide channels count. In this series, HDMA support is added for the Qcom SA8775P SoC and the DMA support in enabled in MHI EPF driver as well. Testing ------- Tested on Qualcomm SA8775P Ride board. Dependency ---------- Depends on: https://lore.kernel.org/dmaengine/20240129-b4-feature_hdma_mainline-v7-0-8e8c1acb7a46@bootlin.com/ https://lore.kernel.org/all/1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com/ NOTE: I've taken over this series from Mrinmay who posted v1: https://lore.kernel.org/linux-pci/1705669223-5655-1-git-send-email-quic_msarkar@quicinc.com/ - Mani Changes in v2: - Dropped dmaengine patches (Sergey) - Reworked dw_pcie_edma_find_chip() to support both eDMA and HDMA (Sergey) - Skipped MF and channel detection if glue drivers have provided them (Sergey) - Addressed review comments in pcie-qcom-ep and pci-epf-mhi drivers (Mani) Signed-off-by: Manivannan Sadhasivam --- Manivannan Sadhasivam (3): PCI: dwc: Refactor dw_pcie_edma_find_chip() API PCI: dwc: Skip finding eDMA channels count if glue drivers have passed them PCI: dwc: Pass the eDMA mapping format flag directly from glue drivers Mrinmay Sarkar (2): PCI: qcom-ep: Add HDMA support for SA8775P SoC PCI: epf-mhi: Enable HDMA for SA8775P SoC drivers/pci/controller/dwc/pcie-designware.c | 62 +++++++++++++++++++++------- drivers/pci/controller/dwc/pcie-designware.h | 5 +-- drivers/pci/controller/dwc/pcie-qcom-ep.c | 23 ++++++++++- drivers/pci/controller/dwc/pcie-rcar-gen4.c | 2 +- drivers/pci/endpoint/functions/pci-epf-mhi.c | 1 + 5 files changed, 72 insertions(+), 21 deletions(-) --- base-commit: fdd10aee7740a53c370a867b8743a8c8945d1db1 change-id: 20240216-dw-hdma-64ddc09fb30b Best regards,