Message ID | 20240213142632.2415127-1-ericchancf@google.com |
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Series |
riscv/barrier: tidying up barrier-related macro
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Message
Eric Chan
Feb. 13, 2024, 2:26 p.m. UTC
This series makes barrier-related macro more neat and clear. This is a follow-up to [0], change to multiple patches, for readability, create new message thread. v2 -> v3: split the patch into multiple patches for one problem per patch. Also review the changelog to make the description more precise. v1 -> v2: makes compilation pass with allyesconfig instead of defconfig only, also satisfy scripts/checkpatch.pl. - (__asm__ __volatile__ (RISCV_FENCE_ASM(p, s) : : : "memory")) + ({ __asm__ __volatile__ (RISCV_FENCE_ASM(p, s) : : : "memory"); }) [0] https://lore.kernel.org/lkml/20240209125048.4078639-1-ericchancf@google.com/ Eric Chan (4): riscv/barrier: Define __{mb,rmb,wmb} riscv/barrier: Define RISCV_FULL_BARRIER riscv/barrier: Consolidate fence definitions riscv/barrier: Resolve checkpath.pl error arch/riscv/include/asm/atomic.h | 24 ++++++++++-------------- arch/riscv/include/asm/barrier.h | 21 ++++++++++----------- arch/riscv/include/asm/cmpxchg.h | 5 ++--- arch/riscv/include/asm/fence.h | 10 ++++++++-- arch/riscv/include/asm/io.h | 8 ++++---- arch/riscv/include/asm/mmio.h | 5 +++-- arch/riscv/include/asm/mmiowb.h | 2 +- 7 files changed, 38 insertions(+), 37 deletions(-) -- 2.43.0.687.g38aa6559b0-goog