Message ID | 20240208034414.22579-1-sunilvl@ventanamicro.com |
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Wysocki" <rafael@kernel.org>, Len Brown <lenb@kernel.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Viresh Kumar <viresh.kumar@linaro.org>, Conor Dooley <conor.dooley@microchip.com>, Andrew Jones <ajones@ventanamicro.com>, Atish Kumar Patra <atishp@rivosinc.com>, Anup Patel <apatel@ventanamicro.com>, Sunil V L <sunilvl@ventanamicro.com> Subject: [PATCH v1 -next 0/3] RISC-V: ACPI: Enable CPPC based cpufreq support Date: Thu, 8 Feb 2024 09:14:11 +0530 Message-Id: <20240208034414.22579-1-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790300817538632697 X-GMAIL-MSGID: 1790300817538632697 |
Series |
RISC-V: ACPI: Enable CPPC based cpufreq support
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Message
Sunil V L
Feb. 8, 2024, 3:44 a.m. UTC
This series enables the support for "Collaborative Processor Performance Control (CPPC) on ACPI based RISC-V platforms. It depends on the encoding of CPPC registers as defined in RISC-V FFH spec [2]. CPPC is described in the ACPI spec [1]. RISC-V FFH spec required to enable this, is available at [2]. [1] - https://uefi.org/specs/ACPI/6.5/08_Processor_Configuration_and_Control.html#collaborative-processor-performance-control [2] - https://github.com/riscv-non-isa/riscv-acpi-ffh/releases/download/v1.0.0/riscv-ffh.pdf The series is based on the LPI support series. Based-on: 20240118062930.245937-1-sunilvl@ventanamicro.com (https://lore.kernel.org/lkml/20240118062930.245937-1-sunilvl@ventanamicro.com/) Sunil V L (3): ACPI: RISC-V: Add CPPC driver cpufreq: Move CPPC configs to common Kconfig and add RISC-V RISC-V: defconfig: Enable CONFIG_ACPI_CPPC_CPUFREQ arch/riscv/configs/defconfig | 1 + drivers/acpi/riscv/Makefile | 1 + drivers/acpi/riscv/cppc.c | 157 +++++++++++++++++++++++++++++++++++ drivers/cpufreq/Kconfig | 29 +++++++ drivers/cpufreq/Kconfig.arm | 26 ------ 5 files changed, 188 insertions(+), 26 deletions(-) create mode 100644 drivers/acpi/riscv/cppc.c
Comments
On Thu, Feb 8, 2024 at 4:44 AM Sunil V L <sunilvl@ventanamicro.com> wrote: > > This series enables the support for "Collaborative Processor Performance > Control (CPPC) on ACPI based RISC-V platforms. It depends on the > encoding of CPPC registers as defined in RISC-V FFH spec [2]. > > CPPC is described in the ACPI spec [1]. RISC-V FFH spec required to > enable this, is available at [2]. > > [1] - https://uefi.org/specs/ACPI/6.5/08_Processor_Configuration_and_Control.html#collaborative-processor-performance-control > [2] - https://github.com/riscv-non-isa/riscv-acpi-ffh/releases/download/v1.0.0/riscv-ffh.pdf > > The series is based on the LPI support series. > Based-on: 20240118062930.245937-1-sunilvl@ventanamicro.com > (https://lore.kernel.org/lkml/20240118062930.245937-1-sunilvl@ventanamicro.com/) > > Sunil V L (3): > ACPI: RISC-V: Add CPPC driver > cpufreq: Move CPPC configs to common Kconfig and add RISC-V > RISC-V: defconfig: Enable CONFIG_ACPI_CPPC_CPUFREQ > > arch/riscv/configs/defconfig | 1 + > drivers/acpi/riscv/Makefile | 1 + > drivers/acpi/riscv/cppc.c | 157 +++++++++++++++++++++++++++++++++++ > drivers/cpufreq/Kconfig | 29 +++++++ > drivers/cpufreq/Kconfig.arm | 26 ------ > 5 files changed, 188 insertions(+), 26 deletions(-) > create mode 100644 drivers/acpi/riscv/cppc.c > > -- This is fine with me, so Acked-by: Rafael J. Wysocki <rafael@kernel.org> and it would be good to ask Viresh (who maintains the CPPC cpufreq driver) for an ACK. Thanks!
On 12-02-24, 16:24, Rafael J. Wysocki wrote: > On Thu, Feb 8, 2024 at 4:44 AM Sunil V L <sunilvl@ventanamicro.com> wrote: > > > > This series enables the support for "Collaborative Processor Performance > > Control (CPPC) on ACPI based RISC-V platforms. It depends on the > > encoding of CPPC registers as defined in RISC-V FFH spec [2]. > > > > CPPC is described in the ACPI spec [1]. RISC-V FFH spec required to > > enable this, is available at [2]. > > > > [1] - https://uefi.org/specs/ACPI/6.5/08_Processor_Configuration_and_Control.html#collaborative-processor-performance-control > > [2] - https://github.com/riscv-non-isa/riscv-acpi-ffh/releases/download/v1.0.0/riscv-ffh.pdf > > > > The series is based on the LPI support series. > > Based-on: 20240118062930.245937-1-sunilvl@ventanamicro.com > > (https://lore.kernel.org/lkml/20240118062930.245937-1-sunilvl@ventanamicro.com/) > > > > Sunil V L (3): > > ACPI: RISC-V: Add CPPC driver > > cpufreq: Move CPPC configs to common Kconfig and add RISC-V > > RISC-V: defconfig: Enable CONFIG_ACPI_CPPC_CPUFREQ > > > > arch/riscv/configs/defconfig | 1 + > > drivers/acpi/riscv/Makefile | 1 + > > drivers/acpi/riscv/cppc.c | 157 +++++++++++++++++++++++++++++++++++ > > drivers/cpufreq/Kconfig | 29 +++++++ > > drivers/cpufreq/Kconfig.arm | 26 ------ > > 5 files changed, 188 insertions(+), 26 deletions(-) > > create mode 100644 drivers/acpi/riscv/cppc.c > > > > -- > > This is fine with me, so > > Acked-by: Rafael J. Wysocki <rafael@kernel.org> > > and it would be good to ask Viresh (who maintains the CPPC cpufreq > driver) for an ACK. I have provided my Ack over the cpufreq patch. Thanks.