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Wysocki" Cc: Andrew Davis , Dhruva Gole , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Markus Schneider-Pargmann Subject: [PATCH 0/3] arm64: am62: Use nvmem for chip information in opp table Date: Tue, 6 Feb 2024 15:57:18 +0100 Message-ID: <20240206145721.2418893-1-msp@baylibre.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790162142764216889 X-GMAIL-MSGID: 1790162142764216889 Hi everyone, the OPP table on am625 currently uses a syscon node to get required information from efuse registers. As efuse registers contain many different information, this series adds nvmem support for the TI OPP table and cpufreq driver. This way just the specific information can be referenced in the devicetree without the need to use a syscon reference. The nvmem layout is added in my previous series, links are below. This series is based on https://lore.kernel.org/linux-arm-kernel/20240206143711.2410135-1-msp@baylibre.com/ Which is also available on my public git: https://gitlab.baylibre.com/msp8/linux/-/tree/topic/ti-chipid-nvmem/v6.8?ref_type=heads This series is available on git as well: https://gitlab.baylibre.com/msp8/linux/-/tree/topic/ti-cpufreq-nvmem/v6.8?ref_type=heads Best, Markus Markus Schneider-Pargmann (3): dt-bindings: cpufreq: Add nvmem-cells for chip information cpufreq: ti-cpufreq: Support nvmem for chip version arm64: dts: ti: k3-am625: Use nvmem-cells for opp .../opp/operating-points-v2-ti-cpu.yaml | 16 ++- arch/arm64/boot/dts/ti/k3-am625.dtsi | 2 + drivers/cpufreq/ti-cpufreq.c | 105 +++++++++++------- 3 files changed, 83 insertions(+), 40 deletions(-)