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Wed, 31 Jan 2024 15:50:44 -0600 From: Judith Mendez To: Ulf Hansson CC: Adrian Hunter , , , Randolph Sapp , Vignesh Raghavendra Subject: [PATCH v1 0/5] Add tuning algorithm for delay chain Date: Wed, 31 Jan 2024 15:50:39 -0600 Message-ID: <20240131215044.3163469-1-jm@ti.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789564508755201333 X-GMAIL-MSGID: 1789645048124483655 This patch series introduces a new tuning algorithm for mmc. The new algorithm should be used when delay chain is enabled. The ITAPDLY is selected from the largest passing window and the buffer is not viewed as a circular buffer. The new tuning algorithm is implemented as per the paper published here [0] and has been tested on the following platforms: AM62x SK, AM62A SK, AM62p SK, AM64x SK, and AM64x EVM. The series also includes a few fixes in the sdhci_am654 driver on OTAPDLYEN/ITAPDLYEN and ITAPDELSEL. [0] https://www.ti.com/lit/an/spract9/spract9.pdf Judith Mendez (5): mmc: sdhci_am654: Add tuning algorithm for delay chain mmc: sdhci_am654: Write ITAPDLY for DDR52 timing mmc: sdhci_am654: Add missing OTAP/ITAP enable mmc: sdhci_am654: Add ITAPDLYSEL in sdhci_j721e_4bit_set_clock mmc: sdhci_am654: Fix ITAPDLY for HS400 timing drivers/mmc/host/sdhci_am654.c | 215 +++++++++++++++++++++++++-------- 1 file changed, 165 insertions(+), 50 deletions(-)