[v4,0/4] membarrier: riscv: Core serializing command

Message ID 20240131144936.29190-1-parri.andrea@gmail.com
Headers
Series membarrier: riscv: Core serializing command |

Message

Andrea Parri Jan. 31, 2024, 2:49 p.m. UTC
  Changes since v3 ([1]):
  - amend documentation

Changes since v2 ([2]):
  - amend inline comments
  - drop ARCH_HAS_MEMBARRIER, create membarrrier.rst

Changes since v1 ([3]):
  - add smp_mb() in switch_mm()
  - introduce ARCH_HAS_MEMBARRIER, amend documentation

Changes since RFC ([4]):
  - introduce prepare_sync_core_cmd()
  - fix nosmp builds

[1] https://lore.kernel.org/lkml/20240110145533.60234-1-parri.andrea@gmail.com/
[2] https://lore.kernel.org/lkml/20231211094414.8078-1-parri.andrea@gmail.com/
[3] https://lore.kernel.org/lkml/20231127103235.28442-1-parri.andrea@gmail.com/
[4] https://lore.kernel.org/lkml/20230803040111.5101-1-parri.andrea@gmail.com/

Andrea Parri (4):
  membarrier: riscv: Add full memory barrier in switch_mm()
  membarrier: Create Documentation/scheduler/membarrier.rst
  locking: Introduce prepare_sync_core_cmd()
  membarrier: riscv: Provide core serializing command

 .../membarrier-sync-core/arch-support.txt     | 18 ++++++-
 Documentation/scheduler/index.rst             |  1 +
 Documentation/scheduler/membarrier.rst        | 39 +++++++++++++++
 MAINTAINERS                                   |  4 +-
 arch/riscv/Kconfig                            |  4 ++
 arch/riscv/include/asm/membarrier.h           | 50 +++++++++++++++++++
 arch/riscv/include/asm/sync_core.h            | 29 +++++++++++
 arch/riscv/mm/context.c                       |  2 +
 include/linux/sync_core.h                     | 16 +++++-
 init/Kconfig                                  |  3 ++
 kernel/sched/core.c                           | 16 ++++--
 kernel/sched/membarrier.c                     | 13 +++--
 12 files changed, 185 insertions(+), 10 deletions(-)
 create mode 100644 Documentation/scheduler/membarrier.rst
 create mode 100644 arch/riscv/include/asm/membarrier.h
 create mode 100644 arch/riscv/include/asm/sync_core.h
  

Comments

Palmer Dabbelt Feb. 16, 2024, 12:56 a.m. UTC | #1
On Wed, 31 Jan 2024 06:49:32 PST (-0800), parri.andrea@gmail.com wrote:
> Changes since v3 ([1]):
>   - amend documentation
>
> Changes since v2 ([2]):
>   - amend inline comments
>   - drop ARCH_HAS_MEMBARRIER, create membarrrier.rst
>
> Changes since v1 ([3]):
>   - add smp_mb() in switch_mm()
>   - introduce ARCH_HAS_MEMBARRIER, amend documentation
>
> Changes since RFC ([4]):
>   - introduce prepare_sync_core_cmd()
>   - fix nosmp builds
>
> [1] https://lore.kernel.org/lkml/20240110145533.60234-1-parri.andrea@gmail.com/
> [2] https://lore.kernel.org/lkml/20231211094414.8078-1-parri.andrea@gmail.com/
> [3] https://lore.kernel.org/lkml/20231127103235.28442-1-parri.andrea@gmail.com/
> [4] https://lore.kernel.org/lkml/20230803040111.5101-1-parri.andrea@gmail.com/
>
> Andrea Parri (4):
>   membarrier: riscv: Add full memory barrier in switch_mm()
>   membarrier: Create Documentation/scheduler/membarrier.rst
>   locking: Introduce prepare_sync_core_cmd()
>   membarrier: riscv: Provide core serializing command
>
>  .../membarrier-sync-core/arch-support.txt     | 18 ++++++-
>  Documentation/scheduler/index.rst             |  1 +
>  Documentation/scheduler/membarrier.rst        | 39 +++++++++++++++
>  MAINTAINERS                                   |  4 +-
>  arch/riscv/Kconfig                            |  4 ++
>  arch/riscv/include/asm/membarrier.h           | 50 +++++++++++++++++++
>  arch/riscv/include/asm/sync_core.h            | 29 +++++++++++
>  arch/riscv/mm/context.c                       |  2 +
>  include/linux/sync_core.h                     | 16 +++++-
>  init/Kconfig                                  |  3 ++
>  kernel/sched/core.c                           | 16 ++++--
>  kernel/sched/membarrier.c                     | 13 +++--
>  12 files changed, 185 insertions(+), 10 deletions(-)
>  create mode 100644 Documentation/scheduler/membarrier.rst
>  create mode 100644 arch/riscv/include/asm/membarrier.h
>  create mode 100644 arch/riscv/include/asm/sync_core.h

I picked these up into my staging tree for the tester this morning, 
there's a few hiccups from my latest master merge but they don't seem 
super exciting.  So it might take a bit for these to show up in my 
for-next, but they're headed in that direction.

LMK if you guys were aiming for some other tree, or want to do some sort 
of shared tag for them.  Otherwise they'll show up in linux-next soon.

Thanks!
  
patchwork-bot+linux-riscv@kernel.org Feb. 22, 2024, 8:20 p.m. UTC | #2
Hello:

This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Wed, 31 Jan 2024 15:49:32 +0100 you wrote:
> Changes since v3 ([1]):
>   - amend documentation
> 
> Changes since v2 ([2]):
>   - amend inline comments
>   - drop ARCH_HAS_MEMBARRIER, create membarrrier.rst
> 
> [...]

Here is the summary with links:
  - [v4,1/4] membarrier: riscv: Add full memory barrier in switch_mm()
    https://git.kernel.org/riscv/c/d6cfd1770f20
  - [v4,2/4] membarrier: Create Documentation/scheduler/membarrier.rst
    https://git.kernel.org/riscv/c/a14d11a0f5f4
  - [v4,3/4] locking: Introduce prepare_sync_core_cmd()
    https://git.kernel.org/riscv/c/4ff4c745a16c
  - [v4,4/4] membarrier: riscv: Provide core serializing command
    https://git.kernel.org/riscv/c/cd9b29014dc6

You are awesome, thank you!