[0/2] riscv: Use CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS to set misaligned access speed

Message ID 20240131-disable_misaligned_probe_config-v1-0-98d155e9cda8@rivosinc.com
Headers
Series riscv: Use CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS to set misaligned access speed |

Message

Charlie Jenkins Feb. 1, 2024, 6:40 a.m. UTC
  If CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is enabled, no time needs to
be spent in the misaligned access speed probe. Disable the probe in this
case and set respective uses to "fast" misaligned accesses. On riscv,
this config is selected if RISCV_EFFICIENT_UNALIGNED_ACCESS is selected,
which is dependent on NONPORTABLE.

Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
---
Charlie Jenkins (2):
      riscv: lib: Introduce has_fast_misaligned_access function
      riscv: Disable misaligned access probe when CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS

 arch/riscv/include/asm/cpufeature.h  | 13 +++++++++++++
 arch/riscv/kernel/cpufeature.c       |  4 ++++
 arch/riscv/kernel/sys_hwprobe.c      |  4 ++++
 arch/riscv/kernel/traps_misaligned.c |  4 ++++
 arch/riscv/lib/csum.c                |  5 +----
 5 files changed, 26 insertions(+), 4 deletions(-)
---
base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d
change-id: 20240131-disable_misaligned_probe_config-043aea375f93