Message ID | 20240119092500.7154-1-quic_jinlmao@quicinc.com |
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Fri, 19 Jan 2024 09:25:12 GMT Received: from hu-jinlmao-lv.qualcomm.com (10.49.16.6) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 19 Jan 2024 01:25:12 -0800 From: Mao Jinlong <quic_jinlmao@quicinc.com> To: Suzuki K Poulose <suzuki.poulose@arm.com>, Mike Leach <mike.leach@linaro.org>, James Clark <james.clark@arm.com>, Leo Yan <leo.yan@linaro.org>, Alexander Shishkin <alexander.shishkin@linux.intel.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Mathieu Poirier <mathieu.poirier@linaro.org> CC: Mao Jinlong <quic_jinlmao@quicinc.com>, <coresight@lists.linaro.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>, Tingwei Zhang <quic_tingweiz@quicinc.com>, Yuanfang Zhang <quic_yuanfang@quicinc.com>, "Tao Zhang" <quic_taozha@quicinc.com> Subject: [PATCH v3 0/2] arm64: dts: qcom: Add coresight nodes for sm8450 Date: Fri, 19 Jan 2024 01:24:56 -0800 Message-ID: <20240119092500.7154-1-quic_jinlmao@quicinc.com> X-Mailer: git-send-email 2.41.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: hLt1EV_AIseKsW6O0teSSBx83zO-XkXE X-Proofpoint-GUID: hLt1EV_AIseKsW6O0teSSBx83zO-XkXE X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-19_04,2024-01-19_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 suspectscore=0 clxscore=1015 mlxlogscore=685 impostorscore=0 lowpriorityscore=0 mlxscore=0 bulkscore=0 priorityscore=1501 phishscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2401190039 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788510352455277412 X-GMAIL-MSGID: 1788510358335275773 |
Series |
arm64: dts: qcom: Add coresight nodes for sm8450
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Message
Mao Jinlong
Jan. 19, 2024, 9:24 a.m. UTC
Add coresight components on Qualcomm SM8450 Soc. The components include TMC ETF/ETR, ETE, STM, TPDM, CTI. And remove the pattern of ete node name. Change since V2: 1. Change the name in binding as 'ete'. Change since V1: 1. Remove the pattern match of ETE node name. 2. Update the tmc-etr node name in DT. Mao Jinlong (2): dt-bindings: arm: coresight: Remove pattern match of ETE node name arm64: dts: qcom: Add coresight nodes for sm8450 .../arm/arm,embedded-trace-extension.yaml | 6 +- arch/arm64/boot/dts/qcom/sm8450.dtsi | 742 ++++++++++++++++++ 2 files changed, 744 insertions(+), 4 deletions(-)