mbox series

[RFC,0/7] firmware: arm_scmi: Qualcomm Vendor Protocol

Message ID 20240117173458.2312669-1-quic_sibis@quicinc.com
Headers
Series firmware: arm_scmi: Qualcomm Vendor Protocol |

Message

Sibi Sankar Jan. 17, 2024, 5:34 p.m. UTC 
  This patch series introduces the Qualcomm SCMI Vendor protocol and adds a
client driver that interacts with the vendor protocol and passes on the
required tuneables to start various features running on the SCMI controller.

The series specifically enables (LLCC/DDR) dvfs on X1E80100 SoC by passing
several tuneables including the IPM ratio (Instructions Per Miss),
cpu frequency to memory/bus frequency tables, CPU mapping to the vendor
protocol which in turn will enable the memory latency governor running
on the SCMI controller.

Depends on:
limits changed notification v2: https://patchwork.kernel.org/project/linux-arm-msm/cover/20240117104116.2055349-1-quic_sibis@quicinc.com/
Turbo support: https://patchwork.kernel.org/project/linux-arm-msm/cover/20240117110443.2060704-1-quic_sibis@quicinc.com/

Shivnandan Kumar (2):
  firmware: arm_scmi: Add QCOM vendor protocol
  soc: qcom: Utilize qcom scmi vendor protocol for bus dvfs

Sibi Sankar (5):
  dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings
  mailbox: Add support for QTI CPUCP mailbox controller
  arm64: dts: qcom: x1e80100: Add cpucp mailbox and sram nodes
  arm64: dts: qcom: x1e80100: Enable cpufreq
  arm64: dts: qcom: x1e80100: Enable LLCC/DDR dvfs

 .../bindings/mailbox/qcom,cpucp-mbox.yaml     |  51 ++
 arch/arm64/boot/dts/qcom/x1e80100.dtsi        | 101 ++++
 drivers/firmware/arm_scmi/Kconfig             |  11 +
 drivers/firmware/arm_scmi/Makefile            |   1 +
 drivers/firmware/arm_scmi/qcom_scmi_vendor.c  | 160 ++++++
 drivers/mailbox/Kconfig                       |   8 +
 drivers/mailbox/Makefile                      |   2 +
 drivers/mailbox/qcom-cpucp-mbox.c             | 265 ++++++++++
 drivers/soc/qcom/Kconfig                      |  10 +
 drivers/soc/qcom/Makefile                     |   1 +
 drivers/soc/qcom/qcom_scmi_client.c           | 486 ++++++++++++++++++
 include/linux/qcom_scmi_vendor.h              |  36 ++
 12 files changed, 1132 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
 create mode 100644 drivers/firmware/arm_scmi/qcom_scmi_vendor.c
 create mode 100644 drivers/mailbox/qcom-cpucp-mbox.c
 create mode 100644 drivers/soc/qcom/qcom_scmi_client.c
 create mode 100644 include/linux/qcom_scmi_vendor.h

Comments

Cristian Marussi Feb. 12, 2024, 6:11 p.m. UTC | #1 
On Wed, Jan 17, 2024 at 11:04:51PM +0530, Sibi Sankar wrote:
> This patch series introduces the Qualcomm SCMI Vendor protocol and adds a
> client driver that interacts with the vendor protocol and passes on the
> required tuneables to start various features running on the SCMI controller.
> 

Hi Sibi,

> The series specifically enables (LLCC/DDR) dvfs on X1E80100 SoC by passing
> several tuneables including the IPM ratio (Instructions Per Miss),
> cpu frequency to memory/bus frequency tables, CPU mapping to the vendor
> protocol which in turn will enable the memory latency governor running
> on the SCMI controller.
> 

As a side note, before I forget (and I got lost again searching for this
thread), next time you post this, please CC also linux-arm-kernel, being
this series SCMI-related this way can be seen by other non-MSM/QC
SCMI-interested people. (as it is advised by get_maintainer.pl too)

Thanks,
Cristian