mbox series

[0/2] arm64: Cortex-A510 erratum 3117295 workaround

Message ID 20240110-arm-errata-a510-v1-0-d02bc51aeeee@kernel.org
Headers
Series arm64: Cortex-A510 erratum 3117295 workaround |

Message

Rob Herring Jan. 10, 2024, 5:29 p.m. UTC 
  This short series enables the existing speculative unprivileged load 
workaround from Cortex-A520 on Cortex-A510 cores which are also affected 
by the erratum. The erratum number is 3117295 and details are available 
in the SDEN[1]. 

Rob

[1] https://developer.arm.com/documentation/SDEN1873361/latest/

Signed-off-by: Rob Herring <robh@kernel.org>
---
Rob Herring (2):
      arm64: Rename ARM64_WORKAROUND_2966298
      arm64: errata: Add Cortex-A510 speculative unprivileged load workaround

 Documentation/arch/arm64/silicon-errata.rst |  2 ++
 arch/arm64/Kconfig                          | 18 ++++++++++++++++++
 arch/arm64/kernel/cpu_errata.c              | 21 +++++++++++++++++----
 arch/arm64/kernel/entry.S                   |  2 +-
 arch/arm64/tools/cpucaps                    |  2 +-
 5 files changed, 39 insertions(+), 6 deletions(-)
---
base-commit: b85ea95d086471afb4ad062012a4d73cd328fa86
change-id: 20240110-arm-errata-a510-23cc219ec1e0

Best regards,

Comments

Will Deacon Jan. 12, 2024, 1:42 p.m. UTC | #1 
On Wed, 10 Jan 2024 11:29:19 -0600, Rob Herring wrote:
> This short series enables the existing speculative unprivileged load
> workaround from Cortex-A520 on Cortex-A510 cores which are also affected
> by the erratum. The erratum number is 3117295 and details are available
> in the SDEN[1].
> 
> Rob
> 
> [...]

Applied to arm64 (for-next/core), thanks!

[1/2] arm64: Rename ARM64_WORKAROUND_2966298
      https://git.kernel.org/arm64/c/546b7cde9b1d
[2/2] arm64: errata: Add Cortex-A510 speculative unprivileged load workaround
      https://git.kernel.org/arm64/c/f827bcdafa2a

Cheers,