Message ID | 20231218-pinephone-pll-fixes-v1-0-e238b6ed6dc1@oltmanns.dev |
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Series |
Pinephone video out fixes (flipping between two frames)
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Message
Frank Oltmanns
Dec. 18, 2023, 1:35 p.m. UTC
On some pinephones the video output sometimes freezes (flips between two
frames) [1]. It seems to be that the reason for this behaviour is that
PLL-MIPI and PLL-VIDEO0 are operating outside there specified limits.
The changes I propose in this patch series consists of two major parts:
1. sunxi-ng: Adhere to the following constraints given in the
Allwinner A64 Manual:
a. PLL-MIPI:
* M/N >= 3
* (PLL_VIDEO0)/M >= 24MHz
b. PLL-VIDEO0:
* 8 <= N/M <= 25
2. Choose a higher clock rate for the ST7703 based XDB599 panel, so
that the panel functions with the Allwinner A64 SOC. PLL-MIPI
must run between 500 MHz and 1.4 GHz. As PLL-MIPI runs at 6 times
the panel's clock rate, we need its clock to be at least 83.333
MHz.
So far, I've tested the patches only on my pinephone. Before the patches
it would freeze at least every other day. With the patches it has not
shown this behavior in over a week.
I very much appreciate your feedback!
[1] https://gitlab.com/postmarketOS/pmaports/-/issues/805
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
---
Frank Oltmanns (5):
clk: sunxi-ng: nkm: Support constraints on m/n ratio and parent rate
clk: sunxi-ng: a64: Add constraints on PLL-MIPI's n/m ratio and parent rate
clk: sunxi-ng: nm: Support constraints on n/m ratio and parent rate
clk: sunxi-ng: a64: Add constraints on PLL-VIDEO0's n/m ratio
drm/panel: st7703: Drive XBD599 panel at higher clock rate
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 10 ++++++--
drivers/clk/sunxi-ng/ccu_nkm.c | 23 ++++++++++++++++++
drivers/clk/sunxi-ng/ccu_nkm.h | 8 +++++++
drivers/clk/sunxi-ng/ccu_nm.c | 21 +++++++++++++++--
drivers/clk/sunxi-ng/ccu_nm.h | 34 +++++++++++++++++++++++++--
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 14 +++++------
6 files changed, 97 insertions(+), 13 deletions(-)
---
base-commit: d0ac5722dae5f4302bb4ef6df10d0afa718df80b
change-id: 20231218-pinephone-pll-fixes-0ccdfde273e4
Best regards,