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[0/3] arm64: dts: ti: Add Itap Delay Value For High Speed DDR

Message ID 20231201082045.790478-1-b-kapoor@ti.com
Headers
Series arm64: dts: ti: Add Itap Delay Value For High Speed DDR |

Message

Bhavya Kapoor Dec. 1, 2023, 8:20 a.m. UTC 
  This Series adds Itap Delay Value for DDR52 speed mode for eMMC in
J7200 and for DDR50 speed mode for MMCSD in J721s2 and J784s4 SoC.

Rebased to next-20231201

Bhavya Kapoor (3):
  arm64: dts: ti: k3-j7200-main: Add Itap Delay Value For DDR52 speed
    mode
  arm64: dts: ti: k3-j721s2-main: Add Itap Delay Value For DDR50 speed
    mode
  arm64: dts: ti: k3-j784s4-main: Add Itap Delay Value For DDR50 speed
    mode

 arch/arm64/boot/dts/ti/k3-j7200-main.dtsi  | 1 +
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 1 +
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 1 +
 3 files changed, 3 insertions(+)

Comments

Kumar, Udit Dec. 5, 2023, 6:31 p.m. UTC | #1 
Hi Bhavya

On 12/1/2023 1:50 PM, Bhavya Kapoor wrote:
> This Series adds Itap Delay Value for DDR52 speed mode for eMMC in
> J7200 and for DDR50 speed mode for MMCSD in J721s2 and J784s4 SoC.
>
> Rebased to next-20231201
>
> Bhavya Kapoor (3):
>    arm64: dts: ti: k3-j7200-main: Add Itap Delay Value For DDR52 speed
>      mode
>    arm64: dts: ti: k3-j721s2-main: Add Itap Delay Value For DDR50 speed
>      mode
>    arm64: dts: ti: k3-j784s4-main: Add Itap Delay Value For DDR50 speed
>      mode

Could you confirm, after adding itap values, above modes are working 
fine apart from

mode detection.

Thanks

Udit


>   arch/arm64/boot/dts/ti/k3-j7200-main.dtsi  | 1 +
>   arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 1 +
>   arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 1 +
>   3 files changed, 3 insertions(+)
>
Bhavya Kapoor Dec. 14, 2023, 11:07 a.m. UTC | #2 
On 06/12/23 12:01 am, Kumar, Udit wrote:
> Hi Bhavya
>
> On 12/1/2023 1:50 PM, Bhavya Kapoor wrote:
>> This Series adds Itap Delay Value for DDR52 speed mode for eMMC in
>> J7200 and for DDR50 speed mode for MMCSD in J721s2 and J784s4 SoC.
>>
>> Rebased to next-20231201
>>
>> Bhavya Kapoor (3):
>>    arm64: dts: ti: k3-j7200-main: Add Itap Delay Value For DDR52 speed
>>      mode
>>    arm64: dts: ti: k3-j721s2-main: Add Itap Delay Value For DDR50 speed
>>      mode
>>    arm64: dts: ti: k3-j784s4-main: Add Itap Delay Value For DDR50 speed
>>      mode
>
> Could you confirm, after adding itap values, above modes are working 
> fine apart from
>
> mode detection.
>
> Thanks
>
> Udit

Hi Udit, Below are the links to the test logs

j7200 ddr52 - 
https://gist.github.com/a0498981/f9b7b7d3592eaca591dec3e72de45585

j721s2 ddr50 - 
https://gist.github.com/a0498981/9861e1df3fe0fc7c050db4f7a8cc34b8

j784s4 ddr50 - 
https://gist.github.com/a0498981/7c598dd708424252e2629fe0c7458a6d

Thanks

~B-Kapoor

>
>
>> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi  | 1 +
>>   arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 1 +
>>   arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 1 +
>>   3 files changed, 3 insertions(+)
>>
Kumar, Udit Dec. 14, 2023, 3 p.m. UTC | #3 
On 12/14/2023 4:37 PM, Bhavya Kapoor wrote:
>
> On 06/12/23 12:01 am, Kumar, Udit wrote:
>> Hi Bhavya
>>
>> On 12/1/2023 1:50 PM, Bhavya Kapoor wrote:
>>> This Series adds Itap Delay Value for DDR52 speed mode for eMMC in
>>> J7200 and for DDR50 speed mode for MMCSD in J721s2 and J784s4 SoC.
>>>
>>> Rebased to next-20231201
>>>
>>> Bhavya Kapoor (3):
>>>    arm64: dts: ti: k3-j7200-main: Add Itap Delay Value For DDR52 speed
>>>      mode
>>>    arm64: dts: ti: k3-j721s2-main: Add Itap Delay Value For DDR50 speed
>>>      mode
>>>    arm64: dts: ti: k3-j784s4-main: Add Itap Delay Value For DDR50 speed
>>>      mode
>>
>> Could you confirm, after adding itap values, above modes are working 
>> fine apart from
>>
>> mode detection.
>>
>> Thanks
>>
>> Udit
>
> Hi Udit, Below are the links to the test logs
>
> j7200 ddr52 - 
> https://gist.github.com/a0498981/f9b7b7d3592eaca591dec3e72de45585
>
> j721s2 ddr50 - 
> https://gist.github.com/a0498981/9861e1df3fe0fc7c050db4f7a8cc34b8
>
> j784s4 ddr50 - 
> https://gist.github.com/a0498981/7c598dd708424252e2629fe0c7458a6d
>
> Thanks
>
> ~B-Kapoor
>

Thanks for logs Bhavya,

With that for series

Reviewed-by: Udit Kumar <u-kumar1@ti.com>



>>
>>
>>> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 1 +
>>>   arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 1 +
>>>   arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 1 +
>>>   3 files changed, 3 insertions(+)
>>>
Nishanth Menon Dec. 15, 2023, 5:21 p.m. UTC | #4 
Hi Bhavya Kapoor,

On Fri, 01 Dec 2023 13:50:42 +0530, Bhavya Kapoor wrote:
> This Series adds Itap Delay Value for DDR52 speed mode for eMMC in
> J7200 and for DDR50 speed mode for MMCSD in J721s2 and J784s4 SoC.
> 
> Rebased to next-20231201
> 
> Bhavya Kapoor (3):
>   arm64: dts: ti: k3-j7200-main: Add Itap Delay Value For DDR52 speed
>     mode
>   arm64: dts: ti: k3-j721s2-main: Add Itap Delay Value For DDR50 speed
>     mode
>   arm64: dts: ti: k3-j784s4-main: Add Itap Delay Value For DDR50 speed
>     mode
> 
> [...]

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/3] arm64: dts: ti: k3-j7200-main: Add Itap Delay Value For DDR52 speed mode
      commit: 908999561b4340089896b89cef51dae07fc001cb
[2/3] arm64: dts: ti: k3-j721s2-main: Add Itap Delay Value For DDR50 speed mode
      commit: 4a52a8208568a85b0d51e5ca81be5925973ef108
[3/3] arm64: dts: ti: k3-j784s4-main: Add Itap Delay Value For DDR50 speed mode
      commit: 8bbe8a7dbaabb84d93321f116966af73ba6a7233

All being well this means that it will be integrated into the linux-next
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[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git