From patchwork Fri Nov 24 10:28:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 17051 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:ce62:0:b0:403:3b70:6f57 with SMTP id o2csp1064806vqx; Fri, 24 Nov 2023 02:32:08 -0800 (PST) X-Google-Smtp-Source: AGHT+IEz/ZPY9e8UotbfNpzDOdwNQ62WgaFDNlVe21m5RimhzYJUbzm+uQnym+CMVVBpMGTi5jK9 X-Received: by 2002:a17:90b:4b4d:b0:280:414d:7a64 with SMTP id mi13-20020a17090b4b4d00b00280414d7a64mr2214555pjb.11.1700821928146; Fri, 24 Nov 2023 02:32:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1700821928; cv=none; d=google.com; s=arc-20160816; b=ZSScPPdVSSmAkXbG8YZ82vO0J7HMbeEAF7kbyDheZqvggNp5V0KusD7PdJwxjs0AJ+ BjLAHnxStaCW4gIH6kCwUcpLs8zF1FvZb8hr06iHLWIhXraf/04kVV3pNcoYkYaL0JPH I8xU3V3IvZHN8JtlOcoRsS/YwtGRdxsWQ3y/ZgRL50I9YQZpGDop+8jV2nYL8W98bb8+ ybT/O2OuqkkEO+qf8Nkg2tXfShLiJPPanqbAx0YmRvEH28WXAofg+bkNJ+uAHsylq5t2 nhlWZBBNRkURI5HV5cocHlfBcwQ2bE9dAjJSDyF52yEKN06Xe+gy0dP1lbjc812TtnLx NnLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=/ikMJ6dcCvOcOyEc4vduvWWWsPcMiHyMtoc+VUHdKRM=; fh=oX6hmw7s8CVkCq535lmsJsLaGsKyCgbCHPgvYWotT9M=; b=tVCB3lRkrzoV87qcH+DuMWxdgEu+LixwKkgWpb9LSKOSGBSKPBI1Q8hiDFfcGEKA5f qDmZJOd9ajBs6krp1cYtOKXyVwrFmIg4FI0wWsVSeMPaSCjfWVG26Ua9HDXg9czDOsqM BdqfrDPisoySzU3iJiuAm0J24EC4O8FhE0jtQjKyJv6Zizrg8qj60xHlcky8eXXnOCsF ixOpPZzI8+LFhBzt/v4LdiulemxidG9AMAkyEdVMIa+E8uEyZ9ofjbm7/pigAxbjOVZt cXgiki7rbpyWPEc8ZaytDthe5dl28M4D/a2JUoSOuTNumjMTj2+umyRauFhyZ4xowg0x t3hw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from fry.vger.email (fry.vger.email. [23.128.96.38]) by mx.google.com with ESMTPS id x3-20020a170902820300b001ce5b8cb05dsi2862519pln.598.2023.11.24.02.32.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Nov 2023 02:32:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) client-ip=23.128.96.38; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 6061C81EF1A0; Fri, 24 Nov 2023 02:32:03 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345377AbjKXKbs (ORCPT + 99 others); Fri, 24 Nov 2023 05:31:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47510 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230334AbjKXKbm (ORCPT ); Fri, 24 Nov 2023 05:31:42 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5CD33110; Fri, 24 Nov 2023 02:31:45 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8BED913D5; Fri, 24 Nov 2023 02:32:31 -0800 (PST) Received: from e127643.arm.com (unknown [10.57.5.4]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 47B063F7A6; Fri, 24 Nov 2023 02:31:43 -0800 (PST) From: James Clark To: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, suzuki.poulose@arm.com, will@kernel.org, mark.rutland@arm.com, anshuman.khandual@arm.com, namhyung@gmail.com Cc: James Clark , Catalin Marinas , Jonathan Corbet , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 0/3] arm64: perf: Add support for event counting threshold Date: Fri, 24 Nov 2023 10:28:54 +0000 Message-Id: <20231124102857.1106453-1-james.clark@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Fri, 24 Nov 2023 02:32:03 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783441054350746687 X-GMAIL-MSGID: 1783441054350746687 Changes since v5: * Restructure the docs and add some more explanations * PMMIR.WIDTH -> PMMIR.THWIDTH in one comment * Don't write EVTYPER.TC if TH is 0. Doesn't have any functional effect but it might be a bit easier to understand the code. * Expand the format field #define names Changes since v4: * Rebase onto v6.7-rc1, it no longer depends on kvmarm/next * Remove change that moved ARMV8_PMU_EVTYPE_MASK to the asm files. This actually depended on those files being included in a certain order with arm_pmuv3.h to avoid circular includes. Now the definition is done programmatically in arm_pmuv3.c instead. Changes since v3: * Drop #include changes to KVM source files because since commit bc512d6a9b92 ("KVM: arm64: Make PMEVTYPER_EL0.NSH RES0 if EL2 isn't advertised"), KVM doesn't use ARMV8_PMU_EVTYPE_MASK anymore Changes since v2: * Split threshold_control attribute into two, threshold_compare and threshold_count so that it's easier to use * Add some notes to the first commit message and the cover letter about the behavior in KVM * Update the docs commit with regards to the split attribute Changes since v1: * Fix build on aarch32 by disabling FEAT_PMUv3_TH and splitting event type mask between the platforms * Change armv8pmu_write_evtype() to take unsigned long instead of u64 so it isn't unnecessarily wide on aarch32 * Add UL suffix to aarch64 event type mask definition ---- FEAT_PMUv3_TH (Armv8.8) is a new feature that allows conditional counting of PMU events depending on how much the event increments on a single cycle. Two new config fields for perf_event_open have been added, and a PMU cap file for reading the max_threshold. See the second commit message and the docs in the last commit for more details. The feature is not currently supported on KVM guests, and PMMIR is set to read as zero, so it's not advertised as available. But it can be added at a later time. Writes to PMEVTYPER.TC and TH from guests are already RES0. The change has been validated on the Arm FVP model: # Zero values, works as expected (as before). $ perf stat -e dtlb_walk/threshold=0,threshold_compare=0/ -- true 5962 dtlb_walk/threshold=0,threshold_compare=0/ # Threshold >= 255 causes count to be 0 because dtlb_walk doesn't # increase by more than 1 per cycle. $ perf stat -e dtlb_walk/threshold=255,threshold_compare=2/ -- true 0 dtlb_walk/threshold=255,threshold_compare=2/ # Keeping comparison as >= but lowering the threshold to 1 makes the # count return. $ perf stat -e dtlb_walk/threshold=1,threshold_compare=2/ -- true 6329 dtlb_walk/threshold=1,threshold_compare=2/ James Clark (3): arm64: perf: Include threshold control fields in PMEVTYPER mask arm64: perf: Add support for event counting threshold Documentation: arm64: Document the PMU event counting threshold feature Documentation/arch/arm64/perf.rst | 72 ++++++++++++++++++++++++ drivers/perf/arm_pmuv3.c | 93 ++++++++++++++++++++++++++++++- include/linux/perf/arm_pmuv3.h | 4 +- 3 files changed, 166 insertions(+), 3 deletions(-)