Message ID | 20231117-arm-psci-system_reset2-vendor-reboots-v1-0-03c4612153e2@quicinc.com |
---|---|
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9910:0:b0:403:3b70:6f57 with SMTP id i16csp823604vqn; Fri, 17 Nov 2023 13:29:46 -0800 (PST) X-Google-Smtp-Source: AGHT+IFmwEcrCBTSG6y7M9/pP3nEvk3zYUvQsRUhfk/3PSa1DAqd88VJ+ij6n4JzjNlJUXKFdZqC X-Received: by 2002:a05:6e02:688:b0:359:3150:c69d with SMTP id o8-20020a056e02068800b003593150c69dmr743178ils.9.1700256586353; Fri, 17 Nov 2023 13:29:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1700256586; cv=none; d=google.com; s=arc-20160816; b=jgGL0dlvjd3fzKBwTPItzgYb6oNKZXQeu4Uvaz6UxSvNuujXb/3RRDKv8Q11JG/9tl dtJKsFYuqZ2sBiEUCTr4mxVwQUGt3yP0zw3bv1SPt//DQnsvOy83ITxQZSUg4s7hR3za LbHkCkqohbhUv+Fiij8L5Oix2j5sHyLuIyl0ZOlvXuLdmyDKS7aF97AXVWLA/Lzke+J0 dAhsdgV4bh5jZzUBkT0KWwlA9WWBo7wWoVDmMxbQMKPUhJt+ySrwZkhzV/a/raavSsGD 33rgkAgj1EKGxmpiUiLHUGuyRuL2raTKJEPBRDVPMUzgQVMZlUpdEfMwNTIByQuHKDwt OyAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:content-transfer-encoding:mime-version :message-id:date:subject:from:dkim-signature; bh=udv6NyKKVwCyn6noriaiVFU15xIFM+OhIbVPIwhcJ8U=; fh=hSqztiRBLPxJl4bBUOWDgSdeKGW5GNzk3N7GGirJHIY=; b=G9mVRFD2hMigqWe7SDtTg7w0WHTI7bBgWv/iikmhR4FZ7rqTv9eXjPX3g5B5+eBkm2 d4PSWgxmYuxXbU9vSY9bO9SsT88S6veEuj+ww+3/hEMid7e/nApnaXLm3UIqxJGGpvS/ /3Z7S5hAieVv+RO4HhqatWKeugVjlLgtxqyRGpkDYUdbuoEfEPiajgRjtS6o/+9dcwQw DyzJtUgRHOZk7CB6iCwVf38W663MfmJfFs+hitAH7XNF6VEqyOuhvQY2oCT3xKMNdbIS o1HY+V/AjQ+WirBtUwcxxEKZ3rCwBK4/US0zZvIh43+56S/IpMF19PqcFuZB5E8QgGg5 COfQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=o9ZmKDY5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from fry.vger.email (fry.vger.email. [2620:137:e000::3:8]) by mx.google.com with ESMTPS id bw23-20020a056a02049700b005bd5a50b559si2895624pgb.715.2023.11.17.13.29.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Nov 2023 13:29:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) client-ip=2620:137:e000::3:8; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=o9ZmKDY5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id D2D648382304; Fri, 17 Nov 2023 13:29:39 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346325AbjKQV1y (ORCPT <rfc822;jaysivo@gmail.com> + 29 others); Fri, 17 Nov 2023 16:27:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235775AbjKQV1r (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 17 Nov 2023 16:27:47 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3CCE02D6D; Fri, 17 Nov 2023 13:19:23 -0800 (PST) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AHKgQv4006270; Fri, 17 Nov 2023 21:19:09 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : subject : date : message-id : mime-version : content-type : content-transfer-encoding : to : cc; s=qcppdkim1; bh=udv6NyKKVwCyn6noriaiVFU15xIFM+OhIbVPIwhcJ8U=; b=o9ZmKDY5oAAYXnX7KcOpAEs64UyzwACMW+VWlIjRtcvY1ZLmAt8/dhyZXNaPL8Nn9sLt ENqnsyAe89hQ9FHZlJE6K5/+1/nlBFXkC7SjPs3pMldLspl4REsQCXtUidkwicupN5/9 A9HzFxPLkgsP97mgI5Se/3cNGFm1p2/sJHHTngOIhyd0Ztu/VjzvzszwaeSR6P6FfCuc qMvWx6b/Ru99RaxXL9wYej33//Ry2C1wUsvfgNQwUshq+n3u/iuHpC0c/LN8j2nh4vge J/lYfHVmtRbVhXmgUsYxGGhpuMTw8ax9l7L6CmWbRJuOwrPtE0GNZk5Kj+TKGQCY2Elp nA== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3ue2na1uaj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 Nov 2023 21:19:08 +0000 Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AHLJ809013105 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 Nov 2023 21:19:08 GMT Received: from hu-eberman-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 17 Nov 2023 13:19:07 -0800 From: Elliot Berman <quic_eberman@quicinc.com> Subject: [PATCH 0/3] Implement vendor resets for PSCI SYSTEM_RESET2 Date: Fri, 17 Nov 2023 13:18:45 -0800 Message-ID: <20231117-arm-psci-system_reset2-vendor-reboots-v1-0-03c4612153e2@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIALXYV2UC/5XNMQ6CQBCF4auYrR0zu4sQrbyHIQZmR50CFneQa Ax3F9TGTsv3iv97GOUkrGa7eJjEg6jEdhp2uTB0rtoTg4RpG4fOW7Q5VKmBTklA79pzc0is3Ds YuA0xQeI6xl6ByFchW+eEBZqp1SU+yu3l7Mtpn0X7mO4vdrDz+xFc9qMwWEDA3NZFQbixGe4uV yFpaUWxmcl3z+M/vUAh5N6vXRXsV68cx/EJ6FI4YywBAAA= To: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Lorenzo Pieralisi <lpieralisi@kernel.org>, Mark Rutland <mark.rutland@arm.com> CC: Satya Durga Srinivasu Prabhala <quic_satyap@quicinc.com>, Melody Olvera <quic_molvera@quicinc.com>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, Florian Fainelli <florian.fainelli@broadcom.com>, Elliot Berman <quic_eberman@quicinc.com> X-Mailer: b4 0.13-dev X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: WKdL-ltEy1yibgSilSECFLnA6e2q4IS1 X-Proofpoint-ORIG-GUID: WKdL-ltEy1yibgSilSECFLnA6e2q4IS1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-17_21,2023-11-17_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 malwarescore=0 mlxscore=0 lowpriorityscore=0 mlxlogscore=949 phishscore=0 suspectscore=0 clxscore=1011 adultscore=0 impostorscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311170159 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Fri, 17 Nov 2023 13:29:39 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782848250649546254 X-GMAIL-MSGID: 1782848250649546254 |
Series |
Implement vendor resets for PSCI SYSTEM_RESET2
|
|
Message
Elliot Berman
Nov. 17, 2023, 9:18 p.m. UTC
The PSCI SYSTEM_RESET2 call allows vendor firmware to define additional
reset types which could be mapped to the reboot argument.
Setting up reboot on Qualcomm devices can be inconsistent from chipset
to chipset. Generally, there is a PMIC register that gets written to
decide the reboot type. There is also sometimes a cookie that can be
written to indicate that the bootloader should behave differently than a
regular boot. These knobs evolve over product generations and require
more drivers. Qualcomm firmwares are beginning to expose vendor
SYSTEM_RESET2 types to simplify driver requirements from Linux.
Add support in PSCI to statically wire reboot mode commands from
userspace to a vendor reset and cookie value using the device tree. The
DT bindings are similar to reboot mode framework except that 2
integers are accepted (the type and cookie). Also, reboot mode framework
is intended to program, but not reboot, the host. PSCI SYSTEM_RESET2
does both. I've not added support for reading ACPI tables since I don't
have any device which provides them + firmware that supports vendor
SYSTEM_RESET2 types.
Previous discussions around SYSTEM_RESET2:
- https://lore.kernel.org/lkml/20230724223057.1208122-2-quic_eberman@quicinc.com/T/
- https://lore.kernel.org/all/4a679542-b48d-7e11-f33a-63535a5c68cb@quicinc.com/
This RFC approach differs from the one sent in July by:
- Not using the reboot mode framework
- Added support to control both reset type and cookie
- Implicitly dropped "normal" reboot command, which is always just
SYSTEM_RESET anyway.
Signed-off-by: Elliot Berman <quic_eberman@quicinc.com>
---
Changes since RFC:
- Reference reboot-mode bindings as suggeted by Rob.
- Link to RFC: https://lore.kernel.org/r/20231030-arm-psci-system_reset2-vendor-reboots-v1-0-dcdd63352ad1@quicinc.com
---
Elliot Berman (3):
dt-bindings: power: reset: Convert mode-.* properties to array
dt-bindings: arm: Document reboot mode magic
firmware: psci: Read and use vendor reset types
Documentation/devicetree/bindings/arm/psci.yaml | 36 ++++++++-
.../bindings/power/reset/reboot-mode.yaml | 7 +-
drivers/firmware/psci/psci.c | 87 +++++++++++++++++++++-
3 files changed, 125 insertions(+), 5 deletions(-)
---
base-commit: f86128050d2d854035bfa461aadf36e6951b2bac
change-id: 20231016-arm-psci-system_reset2-vendor-reboots-cc3ad456c070
Best regards,
Comments
On 17/11/2023 22:18, Elliot Berman wrote: > The PSCI SYSTEM_RESET2 call allows vendor firmware to define additional > reset types which could be mapped to the reboot argument. > > Setting up reboot on Qualcomm devices can be inconsistent from chipset > to chipset. Generally, there is a PMIC register that gets written to > decide the reboot type. There is also sometimes a cookie that can be > written to indicate that the bootloader should behave differently than a > regular boot. These knobs evolve over product generations and require > more drivers. Qualcomm firmwares are beginning to expose vendor > SYSTEM_RESET2 types to simplify driver requirements from Linux. > > Add support in PSCI to statically wire reboot mode commands from > userspace to a vendor reset and cookie value using the device tree. The > DT bindings are similar to reboot mode framework except that 2 > integers are accepted (the type and cookie). Also, reboot mode framework > is intended to program, but not reboot, the host. PSCI SYSTEM_RESET2 > does both. I've not added support for reading ACPI tables since I don't > have any device which provides them + firmware that supports vendor > SYSTEM_RESET2 types. > > Previous discussions around SYSTEM_RESET2: > - https://lore.kernel.org/lkml/20230724223057.1208122-2-quic_eberman@quicinc.com/T/ > - https://lore.kernel.org/all/4a679542-b48d-7e11-f33a-63535a5c68cb@quicinc.com/ Please link here upstream DTS user for this. Best regards, Krzysztof
On 11/20/2023 2:55 AM, Krzysztof Kozlowski wrote: > On 17/11/2023 22:18, Elliot Berman wrote: >> The PSCI SYSTEM_RESET2 call allows vendor firmware to define additional >> reset types which could be mapped to the reboot argument. >> >> Setting up reboot on Qualcomm devices can be inconsistent from chipset >> to chipset. Generally, there is a PMIC register that gets written to >> decide the reboot type. There is also sometimes a cookie that can be >> written to indicate that the bootloader should behave differently than a >> regular boot. These knobs evolve over product generations and require >> more drivers. Qualcomm firmwares are beginning to expose vendor >> SYSTEM_RESET2 types to simplify driver requirements from Linux. >> >> Add support in PSCI to statically wire reboot mode commands from >> userspace to a vendor reset and cookie value using the device tree. The >> DT bindings are similar to reboot mode framework except that 2 >> integers are accepted (the type and cookie). Also, reboot mode framework >> is intended to program, but not reboot, the host. PSCI SYSTEM_RESET2 >> does both. I've not added support for reading ACPI tables since I don't >> have any device which provides them + firmware that supports vendor >> SYSTEM_RESET2 types. >> >> Previous discussions around SYSTEM_RESET2: >> - https://lore.kernel.org/lkml/20230724223057.1208122-2-quic_eberman@quicinc.com/T/ >> - https://lore.kernel.org/all/4a679542-b48d-7e11-f33a-63535a5c68cb@quicinc.com/ > > Please link here upstream DTS user for this. The changes are applicable for SM8650, but hasn't yet landed in arm64/for-next/core. I'll include it in the v2 with note.
On 20/11/2023 17:03, Elliot Berman wrote: > > > On 11/20/2023 2:55 AM, Krzysztof Kozlowski wrote: >> On 17/11/2023 22:18, Elliot Berman wrote: >>> The PSCI SYSTEM_RESET2 call allows vendor firmware to define additional >>> reset types which could be mapped to the reboot argument. >>> >>> Setting up reboot on Qualcomm devices can be inconsistent from chipset >>> to chipset. Generally, there is a PMIC register that gets written to >>> decide the reboot type. There is also sometimes a cookie that can be >>> written to indicate that the bootloader should behave differently than a >>> regular boot. These knobs evolve over product generations and require >>> more drivers. Qualcomm firmwares are beginning to expose vendor >>> SYSTEM_RESET2 types to simplify driver requirements from Linux. >>> >>> Add support in PSCI to statically wire reboot mode commands from >>> userspace to a vendor reset and cookie value using the device tree. The >>> DT bindings are similar to reboot mode framework except that 2 >>> integers are accepted (the type and cookie). Also, reboot mode framework >>> is intended to program, but not reboot, the host. PSCI SYSTEM_RESET2 >>> does both. I've not added support for reading ACPI tables since I don't >>> have any device which provides them + firmware that supports vendor >>> SYSTEM_RESET2 types. >>> >>> Previous discussions around SYSTEM_RESET2: >>> - https://lore.kernel.org/lkml/20230724223057.1208122-2-quic_eberman@quicinc.com/T/ >>> - https://lore.kernel.org/all/4a679542-b48d-7e11-f33a-63535a5c68cb@quicinc.com/ >> >> Please link here upstream DTS user for this. > > The changes are applicable for SM8650, but hasn't yet landed in arm64/for-next/core. > > I'll include it in the v2 with note. It's enough if you link to lore or any other upstream-oriented tree with that user. Does not have to be merged. Best regards, Krzysztof