Message ID | 20231116154952.1206705-1-gabriel.fernandez@foss.st.com |
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Thu, 16 Nov 2023 16:53:57 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3359A100056; Thu, 16 Nov 2023 16:53:48 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 1999023C69E; Thu, 16 Nov 2023 16:53:48 +0100 (CET) Received: from localhost (10.201.21.240) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 16 Nov 2023 16:53:47 +0100 From: <gabriel.fernandez@foss.st.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Philipp Zabel <p.zabel@pengutronix.de>, Gabriel Fernandez <gabriel.fernandez@foss.st.com> CC: <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH v2 0/5] Introduce STM32MP257 clock driver Date: Thu, 16 Nov 2023 16:49:47 +0100 Message-ID: <20231116154952.1206705-1-gabriel.fernandez@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.201.21.240] X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-16_16,2023-11-16_01,2023-05-22_02 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); 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Series |
Introduce STM32MP257 clock driver
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Message
Gabriel FERNANDEZ
Nov. 16, 2023, 3:49 p.m. UTC
From: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
This patch-set introduces clock driver for STM32MP257 based on Arm Cortex-35.
It creates also a menuconfig for all STM32MP clock drivers.
The STM32MP1 and STM32MP13 are now in same stm32 directory
v2:
- rework reset binding (use ID witch start from 0)
- rework reset driver to manage STM32MP13 / STM32MP15 / STM32MP25
new binding of STM32MP25.
- rework YAML documentation
Gabriel Fernandez (5):
clk: stm32mp1: move stm32mp1 clock driver into stm32 directory
clk: stm32mp1: use stm32mp13 reset driver
dt-bindings: stm32: add clocks and reset binding for stm32mp25
platform
clk: stm32: introduce clocks for STM32MP257 platform
arm64: dts: st: add rcc support in stm32mp251
.../bindings/clock/st,stm32mp25-rcc.yaml | 72 +
arch/arm64/boot/dts/st/stm32mp251.dtsi | 59 +-
drivers/clk/Kconfig | 11 +-
drivers/clk/Makefile | 1 -
drivers/clk/stm32/Kconfig | 36 +
drivers/clk/stm32/Makefile | 2 +
drivers/clk/stm32/clk-stm32-core.c | 5 +-
drivers/clk/stm32/clk-stm32-core.h | 5 +-
drivers/clk/{ => stm32}/clk-stm32mp1.c | 127 +-
drivers/clk/stm32/clk-stm32mp13.c | 9 +-
drivers/clk/stm32/clk-stm32mp25.c | 1125 ++++
drivers/clk/stm32/reset-stm32.c | 76 +-
drivers/clk/stm32/reset-stm32.h | 15 +-
drivers/clk/stm32/stm32mp25_rcc.h | 4977 +++++++++++++++++
include/dt-bindings/clock/st,stm32mp25-rcc.h | 492 ++
include/dt-bindings/reset/st,stm32mp25-rcc.h | 165 +
16 files changed, 6996 insertions(+), 181 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
create mode 100644 drivers/clk/stm32/Kconfig
rename drivers/clk/{ => stm32}/clk-stm32mp1.c (95%)
create mode 100644 drivers/clk/stm32/clk-stm32mp25.c
create mode 100644 drivers/clk/stm32/stm32mp25_rcc.h
create mode 100644 include/dt-bindings/clock/st,stm32mp25-rcc.h
create mode 100644 include/dt-bindings/reset/st,stm32mp25-rcc.h