[v4,0/3] LoongArch: KVM: Remove SW timer switch when vcpu is halt polling

  This patches removes SW timer switch during vcpu block stage. VM uses HW
timer rather than SW PV timer on LoongArch system, it can check pending
HW timer interrupt status directly, rather than switch to SW timer and
check injected SW timer interrupt.

When SW timer is not used in vcpu halt-polling mode, the relative
SW timer handling before entering guest can be removed also. Timer
emulation is simpler than before, SW timer emuation is only used in vcpu
thread context switch.
---
Changes in v4:
  If vcpu is scheduled out since there is no pending event, and timer is
fired during sched-out period. SW hrtimer is used to wake up vcpu thread
in time, rather than inject pending timer irq.

Changes in v3:
  Add kvm_arch_vcpu_runnable checking before kvm_vcpu_halt.

Changes in v2:
  Add halt polling support for idle instruction emulation, using api
kvm_vcpu_halt rather than kvm_vcpu_block in function kvm_emu_idle.

---
Bibo Mao (3):
  LoongArch: KVM: Remove SW timer switch when vcpu is halt polling
  LoongArch: KVM: Allow to access HW timer CSR registers always
  LoongArch: KVM: Remove kvm_acquire_timer before entering guest

 arch/loongarch/include/asm/kvm_vcpu.h |  1 -
 arch/loongarch/kvm/exit.c             | 13 +-----
 arch/loongarch/kvm/main.c             |  1 -
 arch/loongarch/kvm/timer.c            | 62 ++++++++++-----------------
 arch/loongarch/kvm/vcpu.c             | 38 ++++------------
 5 files changed, 32 insertions(+), 83 deletions(-)


base-commit: c42d9eeef8e5ba9292eda36fd8e3c11f35ee065c
  

Hi, Bibo,

I suggest submitting this series to the internal repo, too. Because we
don't have enough resources to test the stability for the upstream
version, while this is a fundamental change. On the other hand, the
patch "LoongArch:LSVZ: set timer offset at first time once" can be
submitted first because it is already in the internal repo.

Huacai

On Thu, Nov 16, 2023 at 10:33 AM Bibo Mao <maobibo@loongson.cn> wrote:
>
> This patches removes SW timer switch during vcpu block stage. VM uses HW
> timer rather than SW PV timer on LoongArch system, it can check pending
> HW timer interrupt status directly, rather than switch to SW timer and
> check injected SW timer interrupt.
>
> When SW timer is not used in vcpu halt-polling mode, the relative
> SW timer handling before entering guest can be removed also. Timer
> emulation is simpler than before, SW timer emuation is only used in vcpu
> thread context switch.
> ---
> Changes in v4:
>   If vcpu is scheduled out since there is no pending event, and timer is
> fired during sched-out period. SW hrtimer is used to wake up vcpu thread
> in time, rather than inject pending timer irq.
>
> Changes in v3:
>   Add kvm_arch_vcpu_runnable checking before kvm_vcpu_halt.
>
> Changes in v2:
>   Add halt polling support for idle instruction emulation, using api
> kvm_vcpu_halt rather than kvm_vcpu_block in function kvm_emu_idle.
>
> ---
> Bibo Mao (3):
>   LoongArch: KVM: Remove SW timer switch when vcpu is halt polling
>   LoongArch: KVM: Allow to access HW timer CSR registers always
>   LoongArch: KVM: Remove kvm_acquire_timer before entering guest
>
>  arch/loongarch/include/asm/kvm_vcpu.h |  1 -
>  arch/loongarch/kvm/exit.c             | 13 +-----
>  arch/loongarch/kvm/main.c             |  1 -
>  arch/loongarch/kvm/timer.c            | 62 ++++++++++-----------------
>  arch/loongarch/kvm/vcpu.c             | 38 ++++------------
>  5 files changed, 32 insertions(+), 83 deletions(-)
>
>
> base-commit: c42d9eeef8e5ba9292eda36fd8e3c11f35ee065c
> --
> 2.39.3
>
  

On 2023/11/16 上午10:54, Huacai Chen wrote:
> Hi, Bibo,
> 
> I suggest submitting this series to the internal repo, too. Because we
> don't have enough resources to test the stability for the upstream
> version, while this is a fundamental change. On the other hand, the
> patch "LoongArch:LSVZ: set timer offset at first time once" can be
> submitted first because it is already in the internal repo.
We ever consider to keep the same between internal repo and upstream, 
only that there are many differences since kernel version is different.

We are preparing to setup test environment for upstream kvm module, the 
stability for the upstream is very important for us -:)

Regards
Bibo Mao

> 
> Huacai
> 
> On Thu, Nov 16, 2023 at 10:33 AM Bibo Mao <maobibo@loongson.cn> wrote:
>>
>> This patches removes SW timer switch during vcpu block stage. VM uses HW
>> timer rather than SW PV timer on LoongArch system, it can check pending
>> HW timer interrupt status directly, rather than switch to SW timer and
>> check injected SW timer interrupt.
>>
>> When SW timer is not used in vcpu halt-polling mode, the relative
>> SW timer handling before entering guest can be removed also. Timer
>> emulation is simpler than before, SW timer emuation is only used in vcpu
>> thread context switch.
>> ---
>> Changes in v4:
>>    If vcpu is scheduled out since there is no pending event, and timer is
>> fired during sched-out period. SW hrtimer is used to wake up vcpu thread
>> in time, rather than inject pending timer irq.
>>
>> Changes in v3:
>>    Add kvm_arch_vcpu_runnable checking before kvm_vcpu_halt.
>>
>> Changes in v2:
>>    Add halt polling support for idle instruction emulation, using api
>> kvm_vcpu_halt rather than kvm_vcpu_block in function kvm_emu_idle.
>>
>> ---
>> Bibo Mao (3):
>>    LoongArch: KVM: Remove SW timer switch when vcpu is halt polling
>>    LoongArch: KVM: Allow to access HW timer CSR registers always
>>    LoongArch: KVM: Remove kvm_acquire_timer before entering guest
>>
>>   arch/loongarch/include/asm/kvm_vcpu.h |  1 -
>>   arch/loongarch/kvm/exit.c             | 13 +-----
>>   arch/loongarch/kvm/main.c             |  1 -
>>   arch/loongarch/kvm/timer.c            | 62 ++++++++++-----------------
>>   arch/loongarch/kvm/vcpu.c             | 38 ++++------------
>>   5 files changed, 32 insertions(+), 83 deletions(-)
>>
>>
>> base-commit: c42d9eeef8e5ba9292eda36fd8e3c11f35ee065c
>> --
>> 2.39.3
>>
  

slightly ping...

On 2023/11/16 上午10:30, Bibo Mao wrote:
> This patches removes SW timer switch during vcpu block stage. VM uses HW
> timer rather than SW PV timer on LoongArch system, it can check pending
> HW timer interrupt status directly, rather than switch to SW timer and
> check injected SW timer interrupt.
> 
> When SW timer is not used in vcpu halt-polling mode, the relative
> SW timer handling before entering guest can be removed also. Timer
> emulation is simpler than before, SW timer emuation is only used in vcpu
> thread context switch.
> ---
> Changes in v4:
>    If vcpu is scheduled out since there is no pending event, and timer is
> fired during sched-out period. SW hrtimer is used to wake up vcpu thread
> in time, rather than inject pending timer irq.
> 
> Changes in v3:
>    Add kvm_arch_vcpu_runnable checking before kvm_vcpu_halt.
> 
> Changes in v2:
>    Add halt polling support for idle instruction emulation, using api
> kvm_vcpu_halt rather than kvm_vcpu_block in function kvm_emu_idle.
> 
> ---
> Bibo Mao (3):
>    LoongArch: KVM: Remove SW timer switch when vcpu is halt polling
>    LoongArch: KVM: Allow to access HW timer CSR registers always
>    LoongArch: KVM: Remove kvm_acquire_timer before entering guest
> 
>   arch/loongarch/include/asm/kvm_vcpu.h |  1 -
>   arch/loongarch/kvm/exit.c             | 13 +-----
>   arch/loongarch/kvm/main.c             |  1 -
>   arch/loongarch/kvm/timer.c            | 62 ++++++++++-----------------
>   arch/loongarch/kvm/vcpu.c             | 38 ++++------------
>   5 files changed, 32 insertions(+), 83 deletions(-)
> 
> 
> base-commit: c42d9eeef8e5ba9292eda36fd8e3c11f35ee065c
>